近來由於超大型積體電路(Very Large Scale Integrated Circuits, VLSI)的崛起，以及製程技術的進步，使得高效能以及低體積的晶片成為未來的趨勢。電阻存在於各種不同形式的電路，尤其在高效能低體積的晶片裡，電阻問題將會比以往更為嚴重。舉例來說，電源電壓降(IR drop)，阻容延遲(RC delay)以及基板共擾(substrate coupling)等問題，會隨著製程技術下探而越來越嚴重。為了估計這些電阻問題的電阻值，我們可以配合公式，測量以及軟體來得到電阻值。使用軟體模擬相較於測量以及軟體來說，它的應用範圍廣泛(一個公式只能適用於一個電阻問題)，成本也低廉(為了測量晶片上的電阻值，將一片晶圓實做出來至少需要三千萬台幣)。所以為了確保得到精確的電阻值，正確地使用電磁場模擬軟體來模擬這些電阻問題是有必要的。
在這篇論文中，我們將介紹Raphael，一套可以用來計算電阻值的電磁場模擬軟體。我們將會介紹Raphael的基本功能，以及它的輸出：電導矩陣(conductance matrix)，為了驗證Raphael的正確性以及應用的廣泛性，我們將會舉出幾個常見的電阻問題以及描述Raphael如何應用在這些電阻問題上；我們也使用了一些電阻公式以及公認電阻值來驗證Raphael的正確性。
當Raphael應用於大型電路的設計，有可能會發生計算太慢的問題。為了解決這個問題，我們先為一個電阻問題建立了電阻表格(resistance table)並且在查表時，使用內插法來推算其大略的值。使用這個方法，可以快速的查到需要的電阻值並且不失其正確性。最後介紹本篇論文尚未詳述，未來有發展性的研究方向。

Due to the semiconductor technology progresses, the process technology improves from .18μm to 90nm, even 65nm. So making high-performance and low-volume chip is a trend. Resistance problems exists in every circuit, especially in high-performance low-volume chip, resistance problems will be even serious than before, such as RC delay, IR drop or substrate coupling. In order to estimate these resistance problem efficient and accurately, software simulation before taping out is necessary.
In this thesis we will introduce a field solver called Raphael to help us about the resistance extraction. We will explain the basic knowledge about Raphael and conductance matrix, then show the correctness of Raphael and its application on resistance problems to help IC design. Finally, we will show a way to enhance the speed of resistance extraction in large circuit design.

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