為了享有更高級的無線傳輸品質及速度, 多重輸入多重輸出-正交分頻多工(MIMO-OFDM)的無線通訊技術在最近被視為研究的熱門主題, 本篇論文以FPGA 驗證平台為基礎, 開發一適用於多重輸入多重輸出正交分頻多工內收發機的模擬驗證平台, 期望建立一方便使用, 具
彈性與速度的內部接收器演算法開發平台。首先, 我們以高速無線通訊網路802.11n 的實體層標準, 建立傳送機架構並將其設置於現場可程式化陣列上以硬體產生傳送機pattern 以加快系統模擬速度。而對於內接收器的設計, 多引用現有通用之演算法設計, 包括訊框偵測器、訊框時序同步、通道估測、相位追蹤器、MIMO 偵測器等, 提供內接收機的基礎架構, 並且以軟體模擬通道效應驗證演算法。內接收器的演算法部份在平台上以C 及SystemC 語言模擬, 模組化的演算法可供平台的使用者僅對有興趣的模組作替換更改即可模擬整體系統之效能。平台的模擬流程中, 外收發機為國立台灣大學電子工程研究所吳安宇教授實驗室所開發的「適用於OFDM 外收發機之錯誤更正編解碼」, 通道的模擬則為國立台灣大學電子工程研究所闕志達教授實驗室所開發之「MIMO-OFDM 基頻通道模擬器」, 加上本篇論文所提出之平台可串起整個基頻處理器的完整模擬, 當中外收發器及通道模擬器皆為可輸入參數之硬體模擬器, 在節省模擬時間上有很大的效果, 然而內接收機為了保持程式更改的彈性, 尚不易以硬體實現, 然為了提升軟體模擬的速度, 我們也提出了一些方法改善, 其中最有效的還是將演算法固定的模組, 如FFT, 將其一同置入硬體作軟硬體的共同模擬。最後設計一網頁介面的圖形使用者介面(GUI), 使平台能夠讓使用者輕鬆進入使用, 在這介面上提出了多人使用平台時的工作排程方法。

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