研究生: |
李俊源 Chun-Yuan Lee |
---|---|
論文名稱: |
無線測試系統之測試協定設計及實作 Test Protocol Design and its Implementation for the Wireless Test System |
指導教授: |
黃稚存
Chih-Tsun Huang |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 資訊工程學系 Computer Science |
論文出版年: | 2006 |
畢業學年度: | 94 |
語文別: | 英文 |
論文頁數: | 77 |
中文關鍵詞: | 無線測試 、測試協定 、測試控制 、系統測試 |
外文關鍵詞: | wireless test, test protocol, test control architecture, SoC testing |
相關次數: | 點閱:3 下載:0 |
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當IC設計進入深次微米的製程,系統整合單晶片(SoC)概念的實現變的可行。然而,系統整合單晶片的實現,也帶來許多原本不存在的問題。複雜的系統整合單晶片提高了測試的困難度。連帶地,測試成本也相對的提高。利用傳統測試方法測試系統整合單晶片,得到的結果無法滿足測試品質的需求。因此,我們需要發展新的測試方法來測試系統整合單晶片。
無線測試系統被提出用來解決系統整合單晶片所遇到的測試難題。無線測試系統使用無線訊號傳輸模組取代傳統測試中使用的探針卡接觸來傳輸測試資料。然而,使用無線測試,對於測試流程控制及測試資料傳輸並不如傳統接觸測試來的方便。
我們提出了專門應用於無線測試系統的測試協定及測試控制架構。應用我們所提出的測試控制架構及測試協定,系統整合單晶片利用無線測試系統測試變得更方便。
最後我們利用FPGA實作我們提出的測試控制架構及測試協定。我們實作的控制架構支援記憶體自我測試、記憶體自我診斷、以及Viterbi 邏輯元件自我測試。並且證明使用我們所提出的測試協定及測試控制架構可以增加無線測試對待測物的控制性,並且讓待測物可以更容易的應用無線測試系統,作為其測試的方法。
As IC design entering deep sub-micron age, integrating a system into a single chip called SoC (System on Chip) is possible. SoC often contain complex system functions in it. However, SoC also brings the testing challenges. The omplex functions in SoC makes the testing harder than before. Testing expense in SoC also arises due to the advance of deep submicron technology. Applying traditional test method to catch up testing quality in SoC is di±cult. Thus, we need to develop a new test method to test SoC.
Wireless test system is proposed to resolve test di±culty in traditional test method. Wireless test system removes the probe card in traditional test. Instead, a pair of transceiver equipped in the atuomatic test equipment (ATE) and device under test (DUT) can do the wireless test probing. However, test data transmission and test operation control is not easy in wireless test system. We proposed a test transmission protocol and a test control
architecture called TMU module for wireless test system. With our proposed test transmission protocol and test control architecture, SoC test can easily migrate from traditional test method to wireless test method.
Finally, a wireless test system prototype has been implemented using CC2500 RF module and FPGA board. It supports memory built-in self test (BIST), built-in self diagnosis (BISD), and Viterbi logic BIST. The wireless transmission is controlled by speci‾c media access control (MAC) module. In this prototype, we realized the proposed test transmission protocol and test control architecture in collaboration with MAC module, RF module, DFT module, DUTs, and PC-based ATE by di®erent research groups. Our TMU module can communicate to these test enhancement design and thus control the SoC test operations. The TMU module also can communicate to MAC module, so that TMU can process our proposed test transmission protocol packet without control the wireless data transmission.
Experimental results show that the test transmission protocol and test control architecture can enhance the controllability on wireless test system, and reduce the difficulties in test method migration.
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[2] C.-W. Wang, J.-R. Huang, K.-L. Cheng, H.-S. Hsu, C.-T. Huang, C.-W. Wu, and
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[3] C.-W. Wu, C.-T. Huang, S.-Y. Huang, P.-C. Huang, T.-Y. Chang, and Y.-T. Hsing,
\The HOY tester|Can IC testing go wireless?", in Proc. Int'l Symp. on VLSI Design,
Automation, and Test (VLSI-DAT), Hsinchu, Apr. 2006.
[4] P.-K. Chen, Y.-T. Hsing, and C.-W. Wu, \On feasibility of HOY|a wireless test
methodology for VLSI chips and wafers", in Proc. Int'l Symp. on VLSI Design, Au-
tomation, and Test (VLSI-DAT), Hsinchu, Apr. 2006.
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[6] Dan Zhao, An Integrated Framework for Concurrent Test and Wireless Control in Com-
plex SoCs, PhD dissertation, State University of New York at Bu®alo, Department of
Computer Science and Engineering, Dec. 2003, This is a full PHDTHESIS entry.
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[7] C.-T. Huang, J.-R. Huang, C.-F. Wu, C.-W. Wu, and T.-Y. Chang, \A programmable
BIST core for embedded DRAM", IEEE Design & Test of Computers, vol. 16, no. 1,
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[8] C. Cheng, C.-T. Huang, J.-R. Huang, C.-W. Wu, C.-J. Wey, and M.-C. Tsai, \BRAINS:
A BIST complier for embedded memories", in Proc. IEEE Int'l Symp. on Defect and
Fault Tolerance in VLSI Systems (DFT), Yamanashi, Oct. 2000, pp. 299{307.
[9] K.-L. Cheng, C.-M. Hsueh, J.-R. Huang, J.-C. Yeh, C.-T. Huang, and C.-W. Wu, \Automatic
generation of memory built-in self-test cores for system-on-chip", in Proc. Tenth
IEEE Asian Test Symp. (ATS), Kyoto, Nov. 2001, pp. 91{96.
[10] Chipcon AS., \Cc2500 - single chip low cost low power rf transceiver",
http://www.chipcon.com/, December, 2004.
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