在半導體製程發展的過程中，線寬微縮為主要的趨勢，由1970年的 10 μm逐年下降至近幾年的14 nm、10 nm、7 nm，甚至是5 nm。線寬微縮會使銅內連線中的電子受到銅表面嚴重散射，銅內連線的電阻率隨著線寬微縮逐步上升，電阻-電容延遲也隨之明顯。線寬微縮後，銅內連線上的電流密度也會隨著變大，容易產生電致遷移使銅內連線損壞。本論文係利用電子迴旋共振化學氣相沉積法成長石墨烯於內連線上，石墨烯幫助導電可降低銅內連線電阻，石墨烯也作為覆蓋層，提升銅線可承受的最大電流密度。利用電漿輔助可以降低成長溫度至400°C，有效減少熱預算。本論文一開始先以厚度25 μm銅箔與50 nm銅膜進行測試，並以本實驗室製作的平面式線寬200 nm 銅內連線進行初步測試。再透過一系列實驗設計，找出適合細線寬內連線的實驗參數，將石墨烯沉積於100 nm以下的溝渠式內連線。發現石墨烯可以成功降低電阻率，並提升最大電流密度。此法有機會與目前的後段製程整合，提升內連線穩定度，解決線寬微縮需克服的困難。

During the development of semiconductor process, scaling down node size is the main way to reduce cost and enhance performance. Starting from 10 μm, the node size shrinks to 14 nm, 10 nm, 7 nm, even 5 nm now. Scaling down results in severe electron surface scattering within copper interconnects, thus the resistivity and the RC-delay grow higher. Besides, the current density within copper interconnects is also enhanced so that it is easier for electromigration of copper inside the interconnects which causes failure. In this thesis, the author would like to grow graphene on by ECR-CVD on short line width interconnects. Graphene can reduce the interconnect resistance by shunting with interconnects, and being the capping layer to enhance the breakdown current density interconnects can endure. By using plasma-assisted CVD, the growth temperature can be reduced to 400 °C and lower the thermal budget. The author also grew graphene by ECR-CVD on different thickness of copper, such as copper foil (25 μm in thickness), copper thin film (50 nm in thickness), planar interconnects (200 nm in width) made from our lab. In order to find better parameters for ECR-CVD for trench interconnect (less than 100 nm in width), the author applied design of experiments which can find optimized parameters for ECR-CVD. Finally, the author figure out that graphene can lower the resistivity and enhance the current density of copper interconnects. ECR-CVD has great potentialities integrating with modern backend technology, thus improves the stability of interconnect.

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