本論文描述一個應用於25 0C到1250C精準度為0.10C的溫度感測器上的二階三角積分調變器，透過TSMC 65製程實現電路，並且解析度達到有效位元14bit。首先，解釋SDM兩大特色:超取樣(Oversampling)和雜訊轉移(Noise Shaping)，接著定義每個子電路規格，並且選擇使用CIFB架構讓STF在頻帶外有更好的濾波效果；考慮NTF最佳化、動態範圍縮放避免積分器輸出飽和、NTF極點皆在z-domain維持電路穩定，可以定義出整體SDM係數意即整個SDM的STF和NTF。
因為溫度變化頻率較低意即SDM輸入端為一個較低頻的訊號，所以調變器除了會受到熱雜訊影響還會看到很大的閃爍雜訊；再加上製成變異造成元件不匹配而在輸入端產生偏差電壓，此電壓可視為低頻雜訊；因此在兩級積分器上加入Chopper技術先把訊號移到高頻和低頻雜訊分離，再將訊號移到原本頻帶同時將低頻雜訊移到fc處，透過低通濾波器濾除高頻雜訊，此做法可以減少頻帶內偏差電壓以及低頻的閃爍雜訊1/f達到提升SNR的效果。
最後在供電電壓為1.2V、訊號頻寬為20KHz、超取樣率為256倍意即取樣頻率10M的情形下，所設計的二階調變器可以達到SNR為92.97 dB，相當於有效位元數15.1位元。

This thesis describes a second-order delta-sigma modulator with a 14 significant bits. It is applied to a smart temperature sensor that is accurate to within +0.10C over the temperature range of 25 0C to 125 0C, and to be implemented with TSMC 65 process.

The two major features of SDM, oversampling and noise shaping, will be introduced, and then the specifications of each sub-circuit will be defined. The CIFB architecture will be chosen to make the STF have a better filtering performance.

To consider the optimization of NTF and the using of dynamic range scaling to avoid the output of integrator saturated, all of the poles of NTF should be kept stable in the Z-domain. And then all of the coefficients will be defined, that means the STF, NTF of SDM will be defined.

Since the frequency of variation of temperature is low that means the input of SDM is a low frequency signal, the modulator will be impacted not only by the thermal noise also by the flicker noise, and the mismatch of process variation will caused the biasing voltage that could be considered as a low frequency noise at the input of SDM. As a result, by adding a chopper technique on the second-order modulator to transfer the signal to a higher frequency band that will separate the signal from the low frequency noise. and then transfer the signal back again to the original band and at the same time transfer the low frequency noise to the fc band, and use the low pass filter to filter the high frequency noise. The chopper can reduce the biasing voltage and the low-frequency flicker noise 1/f to get the higher SNR
.
In the situation of power supply voltage 1.2V, signal bandwidth 20 KHz,
the oversampling ratio is 256 that means sampling frequency is 10 MHz,
the designed modulator achieves 98.25 dB SNR which equals 16.03 significant valid bits.

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