研究生: |
曾梓晏 Tseng, Tzu-Yen |
---|---|
論文名稱: |
用於積體電路之製程變動、電壓落差及溫度共同監測方法 PVT Co-Monitoring Methodology for Integrated Circuits |
指導教授: |
黃錫瑜
Huang, Shi-Yu |
口試委員: |
呂學坤
Lu, Shyue-Kung 李進福 Li, Jin-Fu 趙家佐 Chao, Chia-Tso 黃錫瑜 Huang, Shi-Yu |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
論文出版年: | 2011 |
畢業學年度: | 100 |
語文別: | 英文 |
論文頁數: | 39 |
中文關鍵詞: | 環狀震盪器 、製程變動監測 、溫度監測 、電壓落差監測 、晶片線上監測 |
外文關鍵詞: | Ring Oscillator, Process Monitoring, Temperature Monitoring, IR-Drop Monitor, On-line Monitoring |
相關次數: | 點閱:3 下載:0 |
分享至: |
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
在積體電路整合技術上,如晶片系統(SOC)、系統層級封裝(SIP)及三維晶片(3D IC)等,先進的整合技術容易造成溫度升高和電壓落差的現象,此現象輕則造成電路速度或操作頻率變緩慢,嚴重可造成晶片運算錯誤或無法驅動的結果發生。因此,一套能即時線上監控晶片內部溫度和工作電壓的方法是必須的。在我們的研究中,利用環狀震盪器(Ring Oscillator)來達成這項目的。以往,環狀震盪器經常被使用於積體電路中製程變動的監測器。然而,環狀震盪器的震盪週期或頻率會因為三大因素的改變而影響,分別是製程變動(Process Variation)、工作電壓(Supply Voltage)及溫度(Temperature)。在此研究中,我們提出一套便於積體電路使用的環狀震盪器以達成共同多因素考量的線上監測方法,它不僅可提供晶片內部製程變異的程度,同時也可在正常操作環境中監測溫度和電壓落差(IR-drop)。為了達到這個目的,此方法透過自動化輔助軟體來達成下列兩項方案:(1)PVT感知的環狀震盪器週期模組建立與分析,即針對給予或特定的環狀震盪器在不同的操作溫度、和電壓落差之下會反應出不同震盪週期,再將其記錄下來成週期模組,以及(2)在考慮製程變動下,針對積體電路內的工作電壓和操作溫度進行追蹤偵測,而最終將輸出晶片觀察點上的溫度波形與電壓落差波形。
The ring oscillator has long been used as a process monitor inside an IC. However, its clock period is jointly affected by the PVT (Process, Voltage, and Temperature) conditions. In this work, we present a low-cost methodology that can make a ring oscillator an even more versatile monitor – for not only the process status, but also the temperature and the IR-drop traces in normal operation. To achieve this goal, our methodology heavily relies on the support of the software to perform two tasks - (1) PVT-aware clock period modeling of a given ring oscillator, and (2) PVT analysis that derives the temperature trace and the IR-drop trace inside an IC under monitoring considering process variation.
[1] C. Liu, Y. Wu, and Y. Huang, “Effect of IR-Drop on Path Delay Testing Using Statistical Analysis”, Proc. of Asian Test Symp. (ATS), pp. 245-250, Oct. 2007.
[2] Y. Zhong, and D. F. Wong, “Thermal-Aware IR Drop Analysis in Large Power Grid”, Int’l Symp. on Quality Electronic Design (ISQED), pp.194-199, Mar. 2008.
[3] P. Chen, C.-C. Chen, C.-C. Tsai, and W.-F. Lu, ”A Time-to-Digital-Converter-Based CMOS Smart Temperature Sensor”, IEEE J. of Solid-State Circuit (JSSC), vol. 40, no. 8, pp. 1642-1648, Aug. 2005.
[4] K. Woo, S. Meninger, T. Xanthopoulos, E. Crain, D. Ha, and D. Ham, “Dual-DLL-Based CMOS All-Digital Temperature Sensor for Microprocessor Thermal Monitoring”, IEEE Int’l Solid-State Circuits Conf. (ISSCC), Feb. 2009.
[5] Y. Ren, C. Wang, and H. Hong, “An All CMOS Temperature Sensor for Thermal Monitoring of VLSI Circuits”, IEEE Circuits and Systems Int’l Conf. on Testing and Diagnosis, (CAS-ICTD), pp. 1-5, Apr. 2009.
[6] P. Chen, C.-C. Chen, Y.-H. Peng, K.-M. Wang, and Y.- S. Wang, “A Time-Domain SAR Smart Temperature Sensor With Curvature Compensation and a 3σ Inaccuracy of −0.4°C ∼ +0.6°C Over a 0°C to 90°C Range”, IEEE J. of Solid-State Circuit (JSSC), vol. 45, no. 3, pp. 600-609, Mar. 2010.
[7] C.-C. Chung and C.-R. Yang, “An Autocalibrated All-Digital Temperature Sensor for On-Chip Thermal Monitoring”, IEEE Trans. on Circuits and Systems II: Express Briefs, vol. 58, no. 2, pp. 105-109, Feb. 2011.
[8] M. Nourani and A. Radhakrishnan, “Testing On-Die Process Variation in Nanometer VLSI” IEEE Design and Test of Computers, Vol. 23, No. 6, pp. 438-451, Jun. 2006.
[9] M. Nourani and A. Radhakrishnan, “Modeling and Testing Process Variation in Nanometer CMOS”, IEEE Proc. of Int’l Test Conf. (ITC), pp. 1-10, Oct. 2006.
[10] M. Ikeda, H. Aoki, and K. Asada, “DVDT: Design for Voltage Drop Test Using On-Chip Voltage Scan Path”, Int’l Symp. on Quality Electronic Design (ISQED), pp. 305-308, Mar. 2000.
[11] Z. Abuhamdeh, P. Pears, J. Remmers, A. L. Crouch, and B. Hannagan, “Characterize Predicted vs. Actual IR Drop in a Chip Using Scan Clocks”, IEEE Proc. of Int’l Test Conference (ITC), PP. 1-8, Oct. 2006.
[12] Z. Abuhamdeh, B. Hannagan, A.L. Crouch, and J. Remmers, “A Production IR-Drop Screen on a Chip”, IEEE Design and Test of Computers, vol. 24, no. 3, pp. 216-224, 2007.
[13] Z. Abuhamdeh, V. D'Alassandro, R. Pico, D. Montrone, A. Crouch, and A. Tracy, “Separating Temperature Effects from Ring-Oscillator Readings to Measure True IR-Drop On a Chip”, IEEE Proc. of Int’l Test Conference (ITC), pp. 1-10, Oct. 2007.
[14] T.-Y. Wu, S. Gharahi, and J.A. Abraham, “An Area Efficient On-Chip Static IR Drop Detector/Evaluator”, IEEE Int’l Symp. on Circuits and Systems (ISCAS), pp. 2009-2012, May 2009.
[15] I.M. Filanovsky, and A. Allam, “Mutual Compensation of Mobility and Threshold Voltage Temperature Effects with Applications in CMOS Circuits”, IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications, vol. 48, no. 7, pp. 876-884, Jul. 2001.
[16] M.A. Farahat, F.A. Farag, and H.A. Elsimary, “Only Digital Technology Analog-to-Digital Converter Circuit”, IEEE Symp. on Int’l Micro-Nano Mechatronics and Human Science, vol. 1, pp. 178-181, Dec. 2003.
[17] S.-W. Chen, M.-H. Chang, W.-C. Hsieh, and W. Hwang, “Fully On-Chip Temperature, Process, and Voltage Sensors”, IEEE Int’l Symp. on Circuits and Systems (ISCAS), pp. 897-900, 2010.
[18] N. H.E. Weste and D. Harris, “CMOS VLSI Design A Circuits and Systems Perspective 3/E”, Addison Wesley, pp. 196-233, 2005.
[19] “CIC Referenced Flow for Cell-based IC Design”, Chip Implementation Center, CIC, Taiwan, Document no. CIC-DSD-RD-08-01, 2008.