在中等長度的碼長下，非二進制低密度奇偶檢查解碼的錯誤更正能力會優於二進制低密度奇偶檢查解碼。但是相對的其解碼器需要使用比較複雜的的解碼演算法以及更多的儲存空間去實現。本篇論文提出了基於交織最小最大值演算法改進而來的儲存資料壓縮之高效率層皆式解碼器以及其他兩種提升解碼效率的硬體策略，分別是用來降低複雜度的機率式找小值單元、降低儲存空間的新壓縮儲存資料演算法，利用此種壓縮演算法相較於[16]這篇論文可以得到56\%的壓縮率。本篇提出的嶄新層皆式解碼演算法可以讓解碼器減少總體的指令管線層，讓整體解碼效率更為提高。本篇提出的方法使用了在32階的伽羅瓦體下的(837, 726)非二進制類循環區塊低密度奇偶檢查解碼器來應證，在90奈米製程實作下，這個解碼器擁有1228Mbps的吞吐量。與[16]相比有25.8\%的吞吐面積比的提升。

At moderate code length, non-binary (NB) low-density parity-check (LDPC) codes have better error correction capabilities than binary counterpart. Relatively, the high-order Galois fields (GFs) codes require more hardware complexity and memory areas. This paper presents an efficient layered scheduling non-binary LDPC decoder based on trellis Min-Max (TMM) algorithm with compressed storage algorithm and two improvement strategies for reducing decoder areas and enhance decoding throughput. The probabilistic sorting units are used for decreasing complexity in check node processor. And the new compression algorithm makes the storage areas of exchange messages achieve a reduction of 44\%. The novel layered algorithm rearranges the order of pipeline stages and makes the decoding more efficient. We implemented this decoder in 90-nm CMOS technology using the (837, 723) quasi-cyclic (QC) NB-LDPC code over GF(32) for demonstration. By the proposed techniques, the throughput of decoder can reach 1228 Mbps. And the throughput-area ratio increases by 25.8\%.

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