無接面環繞閘極快閃記憶體中，環繞閘極曲率電場增強的效應，使得元件操作速度得以大幅提升。然而，無接面通道中高濃度摻雜，卻使抹除速度面臨瓶頸。在三維結構的記憶體元件使用F-N穿隧抹除的操作方式下，可以藉由材料的特性以及能帶工程，設計電荷儲存層及阻擋氧化層來提升元件抹除特性。
本實驗分為兩個部分，第一部分為快閃記憶體電荷儲存層與阻擋氧化層的堆疊研究。Al2O3對Si有較大的能帶偏移，材料也具有良好的熱穩定性，可以阻擋儲存電荷。而ZrO2對Si有較小的能帶偏移，且具有較高的缺陷密度，能提升元件操作速度。利用Al2O3、ZrO2與SiN組成的電荷儲存層，搭配SiO2與Al2O3組成的阻擋氧化層，可堆疊出適當的結構，增加記憶體元件操作速度。由實驗結果得知在SiN與ZrO2堆疊的電荷儲存層中加入Al2O3無法提升抹除速度。然而，SiO2與Al2O3堆疊的阻擋氧化層則可以減少Al2O3與ZrO2交互反應，進而提升寫入抹除速度。
第二部份為SiN與ZrO2堆疊的電荷儲存層，SiN材料組成對特性影響的研究。由於薄膜成分組成的不同，會影響材料基本特性，缺陷深度也會改變。Si含量的增加可以增加淺缺陷的數量並增加元件操作速度。因此，最佳化的Si含量可以藉由製程參數的調整獲得。實驗結果上，抹除速度因SiN材料中Si的增加而提升。然而，Si含量過高，電荷保持力特性大幅退化。故在SiN電荷捕捉層中適當的Si含量可得到較好的操作特性。

Junctionless Gate-All-Around flash devices operating characteristics can be enhanced by GAA structure, because of GAA curvature electric field enhancement effect. However, high dopant concentration in channel cause memory device difficult to erase. Based on F-N tunneling as operating mechanism in 3D memory devices, erasing speed can be enhanced by design of trapping layer and blocking layer according to material characteristics and bandgap engineering.
The dissertation is divided into two parts as follows. The first part is to investigate the effects of charge trapping layer stack and blocking layer stack on flash memory devices. Al2O3 has high band offset to Si and good thermal stability, it can be applied as a barrier layer of trapped charge. On the other hand, operating speed can be enhanced by ZrO2, because it has smaller band offset to Si and it has higher trap density. Hence, Al2O3, ZrO2 and SiN in trapping layer along with SiO2 in blocking layer can be stacked to improve operation characteristic of flash device. From the experiment results, erasing speed of flash device cannot be enhanced by incorporating Al2O3 into SiN/ZrO2 stack trapping layer. Besides, operation speed of flash device can be enhanced by SiO2/Al2O3 stack blocking layer, because it can reduce the interaction between ZrO2 and Al2O3.
The second part is to investigate the effects of Si content in SiN trapping layer on operating speeds of flash devices. Because thin film characteristics would vary with different atomic composition, energy level of charge traps are also changed with it’s content. As increase of Si content in SiN could increase the amount of shallow trap and enhance operating speed of flash devices. The optimal Si content in SiN for improving operation characteristics of flash device may be obtained by modulating process parameter of SiN formation. From the experiment results, erasing speed can be enhanced by increasing Si content in SiN. However, retention characteristic would be degraded by a high Si content in SiN. Therefore, suitable Si content in SiN trapping layer is needed to retain good operating characteristics.

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