本論文描述一個取樣頻率2.56MHz，訊號頻寬為20KHz，超取樣率(OSR)為64之三階三角積分調變器，而所設計之調變器，主要以作為音頻類比數位轉換器之應用為主要考量。透過交換式電容(Switch Capacitor)電路，實踐整體離散時間系統，主要包含運算放大器、比較器、以及類比開關與電容，為了簡化低電壓三角積分調變器之設計其運算放大器設計之複雜度，透過整體系統架構的特性，大幅降低整體系統對於運算放大器之規格要求。而本論文採用TSMC 2P4M 0.35um CMOS標準製程進行設計，以混合信號模式來設計此電路，並且以Hspice 來對整體電路特性作評估。利用Full-Customer設計之技術來實踐整個電路，使用Cadance來完成整體電路之佈局與驗證，其實體規格為工作電壓3V，頻寬20KHz，信號雜訊比SNR 86dB達到將近14Bit之解析度要求，並且消耗功率5.54mW，此調變器符合應用於音頻之類比數位轉換前端之需求規格。

Regarding the requirements for portable multi-media applications, it is concerned with high resolution A/D and low power consumption. Oversampling techniques based on delta-sigma modulation were widely used to implement the digital audio applications. This type of systems requires high dynamic range (i.e., 14~20bit) at bandwidth of 20khz.
In this thesis, the third order low distortion modulator was designed to achieve the front interface of delta-sigma data converter. By using the characteristics of system to relax the operation amplifier specification. This modulator was integrated in TSMC 0.35 m CMOS technologies. The simulation result could be achieved a peak SNR of 86dB with signal bandwidth 20khz and oversampling ratio of 64. The power consumption was 5.54mW under normal condition.

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