研究生: |
江哲豪 Chiang, Che-Hao |
---|---|
論文名稱: |
具有大範圍頻率應用於微機電振盪器之寬頻鎖相迴路設計 A Wide-Range Phase Locked Loop for MEMS Oscillators |
指導教授: | 盧向成 |
口試委員: |
謝秉璇
劉承賢 |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering |
論文出版年: | 2014 |
畢業學年度: | 103 |
語文別: | 中文 |
論文頁數: | 74 |
中文關鍵詞: | 鎖相迴路 、寬頻鎖相迴路 、微機電振盪器 、自偏壓 |
外文關鍵詞: | PLL, wide range PLL, MEMS oscillator, self-bias |
相關次數: | 點閱:4 下載:0 |
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微機電振盪器傳統上使用相位及增益補償,此種補償方式容易受到製程偏移或環境變異而超出補償有效範圍造成無法起振的情況,利用鎖相迴路可以追蹤頻率的特性有效的提供相位補償。由於一般鎖相迴路的鎖定範圍較窄,若使用此方式來組成一個振盪迴圈需要分別對於不同振盪結構做客製化的電路設計。本研究提出一組泛用於微機電振盪器的寬頻鎖相迴路,使用自偏壓技術,此技術可使阻尼系數、頻寬與參考頻率的比值為一個定值,因此與製程及溫度無關,可以降低抖動並大幅增加鎖相迴路可鎖定的頻率範圍。最後的量測結果得到鎖定範圍可達100 Hz - 4.5 MHz,此頻率範圍適用於多數微機電振盪式感測器的應用,而寬頻鎖相迴路的面積為0.115 ,最低功率消耗為398.2 。
本論文使用 TSMC 0.35 2P4M CMOS 製程將微機電陣列結構與驅動電路整合在同一個晶片上,我們設計出不同共振頻率的電容式振盪結構陣列,經由感測電路使振盪所產生的電流訊號轉換成電壓訊號,再由解碼器輸出至鎖相迴路,並於鎖相迴路輸出端產生一九十度相位差之驅動訊號形成一個振盪迴圈,最後使用寬頻鎖相迴路驅動34.36 kHz與77.94 kHz之微機電振盪器,相位雜訊在1 kHz的相位偏移下分別為-88.39 dBc/Hz與-88.73 dBc/Hz。
MEMS (Microelectromechanical Systems) oscillators commonly require gain and phase compensations to initiate oscillation. The same compensation scheme may not work due to variations from manufacturing processes and/or environmental conditions that result in a shifted resonant frequency. The use of a phase-locked loop (PLL) can effectively track the resonant frequency and ensure proper phase compensation. However, conventional PLLs are often operated in a narrow frequency range, not a wide range suitable for most MEMS applications. This study proposes a wide-range PLL for driving MEMS oscillators by using a self-biasing technique. The technique makes the damping factor and the ratio of bandwidth to operating frequency constant, independent of the manufacturing process and operating temperature. This feature can in turn provide broader operating frequency range and lower jitter performance. Measurement results show that this wide-range PLL can operate from 100 Hz to 4.5 MHz, which is a range suitable for most MEMS oscillators and resonating sensors. The circuit area is 0.115 and the power consumption is 398.2 .
The proposed MEMS oscillator with a wide-range PLL is implemented in the TSMC 0.35 2P4M (two-polysilicon-four-metal) CMOS (Complementary metal oxide semiconductors) process. Both the MEMS resonator and PLL are integrated in one chip. A capacitive MEMS resonator array with different resonant frequencies was designed. In the oscillator loop, the MEMS resonator is driven to resonance and the change of capacitive induces a current which is converted to a sensed voltage. The PLL provides a driving signal to the resonator with a 90-degree phase compensation at the resonant frequency. We successfully demonstrate the operation of a 34.36-kHz and a 77.94-kHz MEMS oscillator by using the wide-range PLL. The measurement results show that the phase noises at a 1-kHz frequency offset are -88.39 dBc/Hz and -88.73 dBc/Hz, respectively.
[1] C. T. C. Nguyen, and R. T. Howe, "An integrated CMOS micromechanical resonator high-oscillator", IEEE Journal of Solid-State Circuits, vol. 34, no. 4, pp. 440-455, Apr. 1999.
[2] W. L. Huang, and Z. Renl, "Fully monolithic cmos nickel micromechanical resonator oscillator", IEEE 21st International Conference, Tucson, AZ, Jan. 2008.
[3] J. Verd, "Monolithic CMOS MEMS oscillator circuit for sensing in the attogram range", IEEE Electron Device Letters, vol. 29, no. 2, pp. 146-148, Feb. 2008.
[4] H. C. Li, S. H. Tseng, P. C. Huang, and M. S.-C. Lu, "Study of CMOS micromachined self-oscillating loop utilizing a phase-locked loop-driving circuit", J. Micromech. and Microeng., vol. 22, no. 5, 055024, 2012.
[5] D. W. Satchel, and J. C. Greenwood, "A thermally-excited silicon accelerometer ", Sensors and Actuators, vol. 17, pp. 241–245, May, 1989.
[6] V. Ferrari, A. Ghisla, D. Marioli, and Taroni, "Silicon resonant accelerometer with electronic compensation of input-output cross-talk", Sensors and Actuators, vol. 123–124, pp. 258-266 , May ,2005.
[7] S. Bouwstra, R. Legtenberg, H. A. C. Tilmans, and M. Elwenspoek, "Resonating microbridge mass flow sensor", Sensors and Actuators, A21-A23, pp. 332-335, 1990.
[8] D. Jin, X. Li, J. Liu, G. Zuo, Y. Wang, M. Liu, and H. Yu, "High-mode resonant piezoresistive cantilever sensors for tens-femtogram resoluble mass sensing in air", J.Micromech. Microeng., vol. 16, pp. 1017-1023 ,2006.
[9] T. P. Burg, A. R. Mirza, N. Milovic, C. H. Tsau, G. A. Popescu, J. S. Foster, and S. R. Manalis, "Vacuum-packaged suspended microchannel resonant mass sensor for biomolecular detection", J.Microelectromech Syst.,vol. 15, pp. 1466-1476, Dec. 2006.
[10] Y. C. Li, M. H. Ho, S. J. Hung, M. H. Chen, and M. S. C. Lu, "CMOS micromachined capacitive cantilevers for mass sensing", J.Micromech. and Microeng., vol. 16, pp. 2659-2665, 2006.
[11] R. Sunier, T. Vancura, Y. Li, K. U. Kirstein, H. Baltes and O. Brand, "Resonant magnetic field sensor with frequency output", J.Microelectromech. Syst., vol. 15, p.p 1098-1107, 2006.
[12] J. Tamayo, "Chemical sensors and biosensors in liquid environmentbased on microcantilevers with amplified quality factor", J.Micromech. and Microeng Ultramicroscopy, vol. 86, pp. 167-76, 2001.
[13] X. Huang, S. Li, J. Schultz, Q. Wang, and Q. Lin, "A capacitive MEMS viscometric sensor for affinity detection of glucose", IEEE, Journal of Microelectromechanical Systems , vol. 18, no. 6, pp. 1246-1254, Dec. 2009.
[14] S. Lee, M. U. Demirci, and C. T. C. Nguyen, "A 10-MHz micromechanical resonator Pierce reference oscillator for communications", Digest of Technical Papers, the 11th Int. Conf. on Solid-State Sensors & Actuators (Transducers’01), Munich, Germany, pp. 1094-1097, June, 2001.
[15] G. C. Wei, and M. S. C. Lu, "Design and characterization of a CMOS MEMS capacitive resonant sensors array", J. Micromech. and Microeng., vol. 22, 125030, 2012.
[16] A. Tajalli, Y. Leblebici, "Extreme low-power mixed signal ic design", Springer , 2010.
[17] C. C. Chung, and C. Y. Lee, "An all-digital phase-locked loop for high-speed clock generation", IEEE J. Solid-State Circuits, vol. 38,no. 2, pp. 347-351, Feb. 2003.
[18] P. -L. Chen, C. -C. Chung, J. -N. Yang, and C. -Y. Lee, “A clock generator with cascaded dynamic frequency counting loops for wide multiplication range applications", IEEE J. Solid-State Circuits,vol. 41, no. 6, pp. 1275-1285, Jun. 2006.
[19] J. G Maneatis, "Low-jitter process-independent DLL and PLL based on self-bias techniques", IEEE J.Solid-State Circuit, vol. 31, pp. 1723-1732, Nov. 1996.
[20] J. G. Maneatis, J. Kim, I. McClatchie, J. Maxey, and M. Shankarads, "Self-biased high-bandwidth low-jitter 1-to-4096 multiplier clock generator PLL", IEEE J.Solid-State Circuits, vol. 38, no. 11, pp. 1795-1803, Nov. 2003.
[21] Y. W. Lin, S. Lee, S. S. Li, Y. Xie, Z. Ren, and C. T. C.Nguyen, "Series-resonant VHF micromechanical resonator reference oscillators", IEEE Journal of Solid-State Circuit, vol.39, no.12, pp. 2477-2491, Dec. 2004.
[22] W. C. Tang, T.C. H. Nguyen, and R. T. Howe, "Laterally driven polysilicon resonant microstructures", Sensor and Actuators, vol. 20, pp. 25-32, 1989.
[23] B. Razavi, "Design of analog CMOS integrated circuit", New York McGraw-Hill, 2001.
[24] P. K. Hanumolu, M. Brownlee, K. Mayaram, and U. K. Moon, "Analysis of charge-pump phase-locked loops", IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 51, no. 9, pp. 1665-1674, Sep. 2004.
[25] E. Sackinger, and W. Guggenbuhl, "A high-swing, high-impedance MOS cascode circuit", IEEE J. Solid-State Circuits, vol.25, pp.289-298, Feb. 1990.
[26] J. G. Maneatis, and M. A. Horowitz, "Precise delay generation using coupled oscillators", IEEE J. Solid-State Circuits, vol. 28, no.12, pp. 1273-1282, Dec. 1993.
[27] J. A. Tierno, A. V. Rylyakov, and D. J. Friedman,"A wide power supply range wide tuning range all static CMOS all digital PLL in 65 nm SOI", IEEE J.Solid-State Circuits, vol. 43, no. 1, pp. 42-51,Jan. 2008.
[28] Vaucher, C. S. Ferencic, I. Locher, M. Sedvallson, S.Voegeli, and U. Z. Wang , "A family of low-power truly modular programmable dividers in standard 0.35-μm CMOS technology", IEEE JSSC, vol. 35, no. 7, pp. 1039-1045, July, 2000.
[29] A. Aktas, and M. Ismail, "CMOS PLL calibration techniques", IEEE Circuits Devices Mag., vol. 20, no.20, pp. 6-11, Sept./Oct. 2004.
[30] W. B. Wilson, U. K. Moon, K. R. Lakshmikumar, and L. Dai, "A CMOS self-calibrating frequency synthesizer", IEEE Journal of Solid-State Circuit, vol.35, pp. 1437-1444, Oct. 2000.
[31] T. Yasuda, "High-speed wide-locking range VCO with frequency calibration", IEICE Trans on Fundamentals, vol. E-83A, pp. 2616-2622, Dec. 2000.
[32] Young, "A PLL clock generator with 5 to 110 MHz of lock range for microprocessors", IEEE J. Solid-State Circuits, vol. 27, no. 2, pp. 1599-1607, Nov. 1992.
[33] D. Mijuskovic, M. Bayer, N. Garg, F. James, P McEntarfer, and J. Porter, "Cell-based fully integrated CMOS frequency synthizer", IEEE J. Solid-State Circuits, vol. 29, pp. 271-279, March, 1994.
[34] I. Novof, R. Kelkar, D. Strayer, S. Wyatt, "Fully integrated CMOS phase-locked loop with 15 to 240MHz locking range and 50 ps jitter", IEEE J.Solid-State Circuits, vol. 30, pp. 1259-1266, Nov. 1995.