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研究生： 何品翰
Ho, Pin-Han
論文名稱： 以一階段共濺鍍法製備具鎵梯度銅銦鎵硒薄膜太陽能電池
Ga-grading of Cu(In, Ga)Se2 solar cell by one-step co-sputtering process
指導教授： 賴志煌
Lai, Chih-Huang
口試委員: 張慶瑞
Chang, Ching-Ray
謝嘉民
Shieh, Jia-Min
學位類別： 碩士
Master
系所名稱： 工學院 - 材料科學工程學系
Materials Science and Engineering
論文出版年： 2019
畢業學年度： 107
語文別： 中文
論文頁數： 61
中文關鍵詞： 薄膜太陽能電池 、銅銦鎵硒 、鎵梯度 、一階段共濺鍍製程
外文關鍵詞： Thin-film solar cells, Cu(In, Ga)Se2, Ga-grading, One-step co-sputtering process
相關次數： 點閱：3  下載：0 
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    • 具有鎵梯度結構對於高效率薄膜銅銦鎵硒(CIGSe)太陽能電池為一關鍵因素，藉由調控鎵含量能夠調整吸收層之導帶位置，在吸收層內不同區域添加鎵梯度結構，將會給予不同的元件影響，如背向階梯式鎵分布藉由額外產生之內建電場，增加長波長區段之載子收集及增加開路電壓；然而，因鎵會受到許多因素影響，導致鎵容易堆積在背電極處並損害元件表現，故不僅在三階段共蒸鍍製程或二階段合金後硒硫化製程中，調控鎵含量為一極其困難之技術。在本研究當中，我們提出利用一階段共濺鍍法製備具鎵梯度結構之銅銦鎵硒太陽能電池，在使用雙靶材進行共濺鍍可直接藉由調整濺鍍功率，建立具有鎵梯度之結構，並比較使用二元Ga2Se3靶材與三元CGSe靶材對於製程與元件之影響。二元Ga2Se3靶材因高能量濺鍍製程，導致靶材氧化並形成Ga2O3化合物，此化合物於CIGSe吸收層內被視為電洞能障，大幅損害元件電性；而三元CGSe靶材因Cu-Se鍵結強度較強之特性，可避免靶材不穩定性問題，儘管如此，計量比之CGSe為一介金屬化合物，易在高溫濺鍍過程中發生相分離，並生成Cu2-XSe二次相，此二次相存在於CIGSe吸收層時會產生針孔狀缺陷，導致開路電壓及填充因子下降。因此我們提出使用缺銅CGSe靶材來克服Cu2-XSe二次相產生之問題，最終藉由添加鎵梯度結構且無二次相存在下，我們可以將單一能隙元件效率12.21%提升至具鎵梯度結構元件效率15.63%。

    Normal Ga-grading structure in CIGSe absorber has been regrarded as a crucial factor for achieving high-efficiency solar cells. Since the Ga is readily segregated in the backside of CIGSe absorber both in three-stage co-evaporation process and two-step process, constructing Ga-grading profile is a challenging but critical work during the deposition. Here, a promising process for controlling the Ga in CIGSe absorber by using one-step co-sputtering has been demonstrated. Co-sputtering with Ga2Se3 binary target and CIGSe quaternary target is directly used to adjust the Ga-grading profile, but the oxidation of Ga2Se3 binary target was observed during the sputtering process and the formation of Ga2O3 in CIGSe absorber is referred to a hole barrier which will deteriorate the device performance. Therefore, we propose another approach to construct the Ga-grading structure by co-sputtering with CGSe ternary target and CIGSe quaternary target. With the addition of Cu, the stability issue of target can be worked out, but the excessive Cu contents lead the formation of Cu2-XSe secondary phase. According to the Raman spectra and phase diagram, the inhibition of Cu2-XSe secondary phase is verified by using Cu21% CGSe ternary target. By co-sputtering with Cu21% CGSe ternary target and CIGSe quaternary target, the highest efficiency of 15.63% without post-selenization can be achieved.

    目錄 第一章 序論 1 1-1 引言 1 1-2 銅銦鎵硒(CIGSe)太陽能電池發展 1 第二章 文獻回顧與探討 3 2-1 太陽能光伏元件 3 2-1.1元件物理 3 2-1.2電壓-電流特性 5 2-2 銅銦鎵硒光伏元件結構 9 2-3 銅銦鎵硒薄膜性質 11 2-3.1成分組成 11 2-3.2結構特性 13 2-3.3薄膜缺陷性質 14 2-3.4銅銦鎵硒薄膜製程 16 2-4 可撓式基板 26 2-4.1基板選擇 26 2-4.2效率回顧 27 2-5 能帶工程 29 第三章 實驗方法與分析技術 32 3-1 試片製備 32 3-2 實驗設備 33 3-3 分析儀器 33 3-3.1 X射線螢光光譜儀 (X-ray Fluorescence Spectrometer, XRF) 33 3-3.2 冷場發射掃描式電子顯微鏡暨能量分布分析儀器 (Scanning Electron Microscope, SEM) 34 3-3.3 化學分析電子能譜儀 ( X-ray Photoelectron spectroscopy, XPS) 34 3-3.4 歐傑電子能譜儀 (Auger Electron Spectroscopy, AES) 35 3-3.5 光激發螢光光譜 (Photoluminescence, PL) & 時間解析光激螢光光譜 (Time-Resolved Photoluminescence, TRPL) 35 3-3.6 拉曼光譜儀 (Raman Spectroscopy) 36 3-3.7 半導體分析系統 (Keithley 4200 SCS) 36 3-3.8 外部量子效率量測儀 (External Quantum Efficiency, EQE) 36 第四章 實驗結果與討論 37 4-1 共濺鍍四元CIGSe靶材與二元Ga2Se3靶材 37 4-1.1 建立背向階梯式鎵分布及優化元件表現 37 4-1.2 氧摻入CIGSe吸收層效應 38 4-2 共濺鍍四元CIGSe靶材與三元CGSe靶材 43 4-2.1 不同鎵梯度之元件表現及Cu2-XSe二次相效應 43 4-2.2 缺銅CGSe靶材及優化元件表現 49 第五章 結論 53 參考文獻 54 圖目錄 圖 2-1 P-N接面示意圖 4 圖 2-2 P-N接面能帶示意圖 4 圖 2-3太陽能光伏元件照光下之電壓-電流曲線 7 圖 2-4光伏電池等校電路圖 8 圖 2-5光伏元件外部量子效率圖 8 圖 2-6 CIGSe太陽能光伏元件結構 9 圖 2-7 Cu2Se-In2Se3擬二元相圖 11 圖 2- 8 CIGSe黃銅礦結構 13 圖 2-9不同條件下的共蒸鍍製程 16 圖 2-10 SAS製程示意圖 18 圖 2- 11 (a) 3, (b) 5, (c) 7, (d) 11, (e) 15, (f) 20 mTorr工作氣壓下Mo電極之SEM表面結構圖 20 圖 2-12 生長於(a) 3, (b) 5, (c) 7, (d) 11, (e) 15, (f) 20 mTorr工作氣壓下Mo電極上CIGSe膜層之SEM表面結構圖 20 圖 2-13 CIGSe擇優取向積分值與Mo殘留應力關係圖 20 圖 2- 14不同工作氣壓下 (a)室溫SLG/CIGSe (b) 500℃SLG/CIGSe (c) 500℃SLG/Mo/CIGSe 之XRD圖 21 圖 2- 15 (a)濺鍍過程中OES分析圖 (b)不同工作氣壓下通過KCN溶液處理前後之成分比值 (c) KCN溶液處理前後之拉曼分析圖 21 圖 2-16 KCN溶液處理前後之元件表現圖 22 圖 2-17 (a)添加NaF前後之元件效率 (b)添加NaF前後之I-V曲線 23 圖 2-18 不同後處理之TRPL衰退曲線 24 圖 2-19 不同後處理之元件表現 24 圖 2-20 階梯式鎵分布示意圖 30 圖 2-21 [Ga]/([Ga]+[In])比例之SIMS分布圖 31 圖 2-22 有無背向階梯式鎵分布之EQE圖 31 圖 4-1 有無Ga2Se3共鍍元件之 (a) GGI比例縱深分布圖 (b) TRPL圖 37 圖 4-2 最佳Ga2Se3共濺鍍元件之電性分析 (a) I-V圖 (b) EQE圖 38 圖 4-3 具鎵梯度共鍍元件之I-V曲線及元件特性 39 圖 4-4 XPS組成成分縱深分析 39 圖 4-5 全新靶材之XPS組成成分能譜 (a) Ga 2p3/2 (b) Se 3d3/2, 5/2 (c) O 1s 與已濺鍍使用靶材之XPS組成成分能譜 (d) Ga 2p3/2 (e) Se 3d3/2, 5/2 (f) O 1s 40 圖 4-6 已濺鍍使用靶材之SEM表面形貌影像圖 41 圖 4-7 第五次與第十五次濺鍍測試後CGSe薄膜之XPS組成成分能譜 (a) Cu 2p3/2 (b) Ga 2p3/2 (c) Se 3d3/2, 5/2 (d) O 1s 44 圖 4-8 截面微結構SEM影像 (a) Ga2Se3共鍍吸收層 (b) CGSe共鍍吸收層 45 圖 4-9 利用CIGSe與CGSe雙靶材共濺鍍建立不同鎵梯度之GGI比例縱深分布圖 45 圖 4-10 不同鎵梯度元件之TRPL圖 46 圖 4-11 不同鎵梯度之元件表現 (a) Voc (b) Jsc (c) FF (d) Efficiency (e) I-V圖 (f) EQE圖 47 圖 4-12 CIGSe+Cu25%-CGSe靠近背電極處之 (a)拉曼光譜 (b)放大拉曼光譜 48 圖 4-13 Cu2Se-Ga2Se3相圖 49 圖 4-14 使用缺銅CGSe靶材共濺鍍元件之拉曼光譜 51 圖 4-15使用缺銅CGSe靶材共濺鍍元件之GGI比例縱深分布圖 51 圖 4-16 使用缺銅CGSe靶材製作最佳元件添加抗反射層前後之 (a) I-V圖 (b) EQE圖 52   表目錄 表 2-1 CIGSe薄膜主要缺陷種類 14 表 2-2 各團隊於一階段濺鍍製程之元件表現總表 25 表 2-3 各種類可撓式基板之最高元件效率總表 28 表 4-1 已濺鍍使用靶材表面組成成分EDS分析 41 表 4-2 Ga-Se化合物之可能氧化途徑 42 表 4-3 硒逸散機制途徑 42 表 4-4 Cu-Ga-Se化合物氧化之熱力學方程式 43 表 4-5 不同成分CGSe靶材共濺鍍元件之平均CGI比例與GGI比例 50 表 4-6 分別使用富銅及缺銅CGSe靶材製作相同鎵梯度之元件表現比較 51

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