研究生: |
洪柏璿 Po-Hsuan Hung |
---|---|
論文名稱: |
干擾性插單之成本模型與決策系統建立-以半導體廠為例 Cost Model and Decision Analysis System for Interruptive Production Requests - I.C. Fabrication Industry |
指導教授: | 許棟樑 |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
工學院 - 工業工程與工程管理學系 Department of Industrial Engineering and Engineering Management |
論文出版年: | 2007 |
畢業學年度: | 95 |
語文別: | 中文 |
論文頁數: | 59 |
中文關鍵詞: | 干擾性插單 、成本模型 、成本分析 |
外文關鍵詞: | Interruptive Production, Cost Model, Cost Analysis, Disruptive Production, Super Hot Run/Lot |
相關次數: | 點閱:1 下載:0 |
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干擾性插單現象係指工廠生產時未依照正常下單或是派工法則程序生產,而把某些訂單提前生產,改變機台原已優化的作業製程。這個現象對於半導體產業影響甚鉅,其中期末拉貨與超急件(Super Hot Run)都為干擾性插單。期末拉貨現象為自有產品的記憶體生產公司,為了因應市場需求與價格高低而改變原先優化的派工法則。此兩種干擾性插單都深深影響工廠效率。
在業界都清楚干擾性插單不利於工廠效率,卻一直未見有學者深入探討其成本與效益。某知名半導體廠主管初估其成本損失每個月至少應達數億元以上。本論文研究以動態隨機存取記憶體廠為例,深入探討並量化干擾性插單之現象,找出半導體成本計算項目與方式,以及其存在的需求性與負面影響程度。本研究並建立以Excel為基礎的試算表,提供業界利用試算表計算干擾性插單之效益及損失。
Interruptive production refers to abrupt change of production items or sequence in otherwise planned or optimized production schedule. Factories usually operate based on a planned schedule or set order releasing and dispatching rules which presumably enable efficient operations. However, in order to make the monthly production figures look better, it is often in industries that factories pull up the production priorities of products that can be finished by the end of each month thus disregarding the normal plan or dispatching rules. This phenomenon and the “super-hot-run” situations are interruptive productions which disrupt the optimal schedule and dispatching scheme. The negative impacts of disruptive productions may be quite significant – especially in semiconductor fabs when interruptive production changes often cause huge financial and operational impacts. Many people realize the negative impact of disruptive production, yet, there has been little known literature providing in-depth cost/benefit model for such phenomena not to mention a spread-sheet based decision support system for usage. This research analyzed in great depth the disruptive production phenomena in thin film and etching areas of a DRAM fab and established a cost model for such practice using I.C. fabrication industry as the application platform.
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