為了因應高速傳輸的需求與便利性，無線區域網路、無線都會網路以及無線個人網路已逐漸發展。針對此三種無線網路，近幾年有許多標準被提出，而新一代的標準分別為IEEE 802.11n、IEEE 802.16e以及IEEE 802.15.3a。以上三種標準皆以多頻帶正交分頻多工為其核心技術，而快速傅利葉轉換器是其中的關鍵性模組。
在這篇論文中，我們提出一個適用於超寬頻應用之高輸出率、低功率及低面積之快速傅立葉轉換處理器。所採用的是以24為底的快速傅立葉轉換演算法，是一個可以有效的地使運算過程中複數乘法的數量減到最小的快速傅立葉轉換演算法。因為以24為底的演算法有其規律性和較低的硬體複雜度，非常適合用在超大型積體電路的實現上面，尤其是在管路式架構的實現上。在設計中，我們使用常數乘法器來取代傳統的複數乘法器，以用來節省乘法運算時所消耗的龐大功率及硬體資源。我們也利用多頻率的策略來減少所提出架構中前四級運算器的功率及硬體成本。
這篇論文所提出的快速傅利葉轉換處理器是針對IEEE 802.15.3a的應用而設計，而且是利用UMC90奈米的製程來做合成及驗證。我們所提出的快速傅利葉轉換處理器可以達到1.16Gsample/s的輸出率，而所消耗的功率為25.63mW。且所設計的常數乘法器面積只相當於3.4個複數乘法器。最後整個運算器面積為0.762x0.786mm2。

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