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研究生: 王靜弘
論文名稱: 適用於二維平面天線陣列多輸入多輸出系統之低複雜度混合訊號預編碼處理器
A Low Complexity Mixed-Signal Precoding Processor for 2D Planar Antenna Array MIMO Systems
指導教授: 黃元豪
口試委員: 蔡佩芸
伍紹勳
黃元豪
陳喬恩
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 通訊工程研究所
Communications Engineering
論文出版年: 2014
畢業學年度: 103
語文別: 中文
論文頁數: 86
中文關鍵詞: 二維平面天線陣列多輸入多輸出系統混合訊號預編碼處理器
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  • 大型多輸入多輸出系統在通訊學術界上是項最近被討論很熱烈的一項技術,大型多輸入多輸出系統使用很大數目的傳送天線來傳送訊號給接收端,造成資料傳輸量以及錯誤率比起傳統的多輸入多輸出系統在短距離的通訊傳送環境下有更好的表現。若要使用大型多輸入多輸出系統,在基地台端若要設置大量的天線當作傳送用的天線,必須要有大量的空間來擺設。本論文使用2維的平面天線陣列的系統來傳輸訊號使得基地台的空間使用效率較高。另外因為使用大量的天線數目,使得射頻電路的複雜度也隨之增加。
    為了降低電路硬體的複雜度,本篇論文提出兩種可能方法,第一種是在預編碼之前選擇傳輸天線來降低天線的使用量,第二種是使用混訊預編碼的訊號處理來達到降低電路的複雜度。本論文除了分析天線選擇技術所造成的影響以及毫米波通道模型的特性以外,也提出新的射頻/基頻預編碼處理演算法,比起一些其他相關演算法更能減少一點運算的複雜度、增加硬體的平行度,更重要的是能大量縮小之後硬體實現的大小。射頻/基頻預編碼處理演算法是在使用TSMC based cell 的製程條件下提出。此新的射頻/基頻預編碼處理適用於16x8二維天線陣列多輸入多輸出系統,能夠支援一到四個資料串的傳輸模式。


    Massive MIMO systems are popularly discussed among ICTs academic members presently.
    The systems applied a large numbers of transmitted antennas to transmit signals to receiver
    which had improved data rate and error rate. The systems proved to work out
    better than traditional MIMO systems in short-distance transmission. To apply the
    Massive MIMO systems, the Base station must installs a lot of antennas and the installment
    costs spaces. In this paper, I would like to introduce a 2 dimensional planar
    antenna array to improve space eciency. Moreover, the applying of large numbers of
    antennas has hiked the complexity of radio frequency chains. To reduce the complexity
    of hardware, it has 2 possible methods to solve this problem, one of them is using
    the antenna selection before the signal precoding process to lower the number of used
    antennas, and another method is using the hybrid precoding process to decrease the
    complexity of the precoding circuit. In this thesis, we are not only analyzed the e ect
    of the antenna selection and the property of millimeter wave channel model, but also
    proposed a new modi cation algorithm of joint RF and baseband precoding scheme.
    Comparing the other algorithms which are relative with the joint RF and baseband
    precoding scheme, the new algorithm is able to reduce the computational complexity
    and increase the high parallelism hardware architecture. Moreover, it can signi cantly
    reduce the area of hardware implementation. The proposed algorithm of precoding for
    16x8 two dimensional planar antenna array MIMO systems can supposes in four-, three-,
    two-, and one-stream modes, respectively.

    Contents 1 Introduction 1 1.1 Two Dimensional Planar Antenna Array Massive MIMO Systems . . . . 1 1.2 Research Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 Organization of This Thesis . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.4 Notations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Precoding Scheme for the Single-User MIMO Channel 5 2.1 MIMO Channel Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1.1 Millimeter Wave Channel Model . . . . . . . . . . . . . . . . . . . 6 2.1.2 WinnerII Channel Model . . . . . . . . . . . . . . . . . . . . . . . 10 2.1.3 Correlation Channel Model . . . . . . . . . . . . . . . . . . . . . 12 2.2 SVD-Based Precoding Method . . . . . . . . . . . . . . . . . . . . . . . . 13 2.2.1 Singular Value Decomposition . . . . . . . . . . . . . . . . . . . . 13 2.2.2 SVD-Based Precoding Scheme . . . . . . . . . . . . . . . . . . . . 14 2.3 Joint RF/Baseband Precoding Scheme via Simultaneous Orthogonal Matching Pursuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2.3.1 Joint RF/Baseband Precoding Scheme . . . . . . . . . . . . . . . 16 2.3.2 Precoder Reconstruction via Simultaneous Orthogonal Matching Pursuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.3.3 Generation of Array Response Vectors . . . . . . . . . . . . . . . 21 2.4 Antenna Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 2.4.1 K-Regular Beamformer . . . . . . . . . . . . . . . . . . . . . . . . 25 2.4.2 Maximum Ratio Combining . . . . . . . . . . . . . . . . . . . . . 26 2.5 Parallel-Index-Selection Matrix-Inversion-Bypass Simultaneous Orthogonal Matching Pursuit Algorithm . . . . . . . . . . . . . . . . . . . . . . . 28 3 Proposed Precoder/Combiner Index Selection Algorithm and Antenna Selection Schemes 31 3.1 Antenna Selection Schemes for 2D Planar Antenna Array . . . . . . . . . 32 3.1.1 Antenna Selection Schemes . . . . . . . . . . . . . . . . . . . . . . 33 3.1.2 Correlation Channel Analysis . . . . . . . . . . . . . . . . . . . . 37 3.2 Proposed Sliding-Window-Index-Selection Matrix-Inversion-Bypass Simultaneous Orthogonal Matching Pursuit Algorithm . . . . . . . . . . . . . 40 3.2.1 System Parameter of Simultaneous Orthogonal Matching Pursuit Algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.2.2 Proposed Sliding-Window-Index-Selection Matrix-Inversion-Bypass Simultaneous Orthogonal Matching Pursuit Algorithm . . . . . . 45 3.2.3 Algorithm Modi cation for Hardware Implementation . . . . . . . 51 3.3 Computation Complexity and Performance Analysis . . . . . . . . . . . . 54 4 VLSI Architecture Design 59 4.1 System Block Diagram and Simulation Environment . . . . . . . . . . . . 60 4.2 Hardware Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 4.2.1 Index Selection Unit . . . . . . . . . . . . . . . . . . . . . . . . . 63 4.2.2 Reconstruction Unit . . . . . . . . . . . . . . . . . . . . . . . . . 70 4.3 Area of the Hardware Implement Analysis . . . . . . . . . . . . . . . . . 75 4.4 Timing Diagrams of the Proposed Processor . . . . . . . . . . . . . . . . 76 5 Conclusion and Future Work 79 5.1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79 5.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80

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