由於製程技術不斷的進步，在有限平面內所能擺放的電晶體個數最後會達到各元件所能容忍的最小尺寸而趨於飽和。三維晶片（3D IC）被認為可以有效的解決此一問題，透過在垂直方向堆疊多個晶粒（Die）用來增加面積來給電晶體擺放。而穿矽連接孔（Through Silicon Via, TSV）則是用來進行彼此間溝通的橋樑。但是在製程上由於穿矽連接孔的良率不佳，導致三維晶片的良率下降，因此為了增進三維晶片的良率，我們有必要針對穿矽連接孔進行測試，包含除錯、修復。

在這篇論文中，我們提出了一個內建自我修復的方法能修復在三維晶片內過大延遲時間的穿矽連接孔。我們採用了振盪環的概念，利用一些周邊電路與一對穿矽連接孔來形成一個振盪環。基於這些基礎，我們提出一個稱之為可變輸出閥值（VOT）的方法來進一步推導出在振盪環裡每一根穿矽連接孔的延遲時間。在這個過程中，我們使用了一個可變閥值反向器，此反向器是由正常的反向器和史密斯觸發反向器組合而成。接著我們再量測這些變動量並經由一些分析來得出每根穿矽連接孔的延遲時間。得知了每根穿矽連接孔的延遲時間之後，我們同時也建構了內建自我測試電路去修復大延遲時間的穿矽連接孔。

In this thesis, we propose a built in self repair (BISR) method that can automatically repair the large propagation delays across the Through Silicon Vias (TSVs) in a 3D IC. We adopt the concept of the oscillation ring (OR) test, in which two TSVs are connected with some peripheral circuits to form an oscillation ring. Based on this foundation, we propose a technique called Variable Output Threshold (VOT) to further derive the propagation delay of each individual TSV in the oscillation ring. In this process, we use the Variable Threshold (VT) inverter that combine a normal inverter and a Schmitt Trigger (ST) inverter, and then measure their effects in terms of the change of the oscillation ring’s period. By some following analysis, the propagation delay of each TSV can be revealed. We also construct a BISR circuit for block array to repair weakly TSVs that have large delay.

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