在本論文中，我們提出了一個多晶矽薄膜電晶體的半經驗式漏電模型。在此模型中我們使用了一個修正後的SRH公式並導入一個半經驗式電場來計算漏電的大小。
首先，我們使用Dimitriadis所提出的方法來計算缺陷在能帶中的態位密度，而後再使用修正後的SRH公式來計算其中的產生複合速率，此一修正後的SRH公式考慮了具聲子幫助的穿隧電流，此一穿隧電流尚結合了Poole-Frenkel效應，使得漏電模型更具有物理意涵。最後再導入一個半經驗式的電場，此半經驗式的電場僅使用一個擬合參數，大為降低人為的干擾。
我們將此一模型與實驗數據比較也得到了一個相近的結果，並討論電場與缺陷在能帶中的態位密度，個別如何影響到漏電的變化。

The proposition of this thesis is an empirical leakage current model of polysilicon thin film transistor. In this model, we used a modified SRH equation and introduce an empirical electrical field to calculate the electrical field near the drain side.
Firstly, we used Dimitriadis’s method to calculate the density of state in the band gap, and then combined with a modified SRH equation. This modified SRH equation can consider the phonon-assisted tunneling combined the Poole-Frenkel effect and offer more physical-insight to the leakage current model. Finally, to introduce an empirical electrical field to estimate electrical field near the drain side. There is only one fitting parameter in the empirical electrical field to reduce the artificial interference.
Good agreements are found when comparing the simulated results with experimental results. And discuss the different influences for leakage current between the density of state in the band gap and electrical field near the drain side.

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