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研究生: 吳邦豪
Bang-hao Wu
論文名稱: 積體電路銅內連線電鍍程序之動態模擬
Feature Scale Simulation of Copper Deposition for IC Interconnection
指導教授: 萬其超
Chi-Chao Wan
王詠雲
Yung-Yun Wang
口試委員:
學位類別: 碩士
Master
系所名稱: 工學院 - 化學工程學系
Department of Chemical Engineering
論文出版年: 2000
畢業學年度: 88
語文別: 中文
論文頁數: 72
中文關鍵詞: 積體電路電鍍銅內連線模擬邊界元素法
外文關鍵詞: ULSI, Electrodeposition, Copper Interconnection, Simulation, Boundary Element Method
相關次數: 點閱:3下載:0
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  • 本論文以邊界元素法輔以邊界移動法來模擬推算電鍍銅在微孔內之成長狀況。經過適當的無因次分析,吾人可發現電場作用力以及流場的效應在毫微孔電鍍中是可以忽略的。因此在質量守恆以及quasi steady state假設的前提下,系統方程式將可簡化為質量傳送的Laplace方程式。將系統方程式伴以適當的邊界條件,並輔以邊界移動法來動態預測鍍膜的增長,吾人便可得到電鍍結果的預測。吾人用類似的方法,去探討電鍍條件的影響。最後綜合比較發現,較低的外加電流密度,較低的深寬比孔洞,較高的硫酸銅濃度,將有助於電鍍銅層的填孔能力,並減小裂縫狀孔洞的尺寸。
    目前我們更致力於模擬系統之完善,增加對鍍液潤濕能力(wettability)的考量。此部份的考量尚未出現於國內外相關的電鍍模擬文獻。初步的結果發現,在特定的小孔幾何形狀下,吾人可以利用一無因次數K來作鍍液潤濕能力的指標。吾人發現,隨著無因次式K的增加,將使鍍液潤濕能力提高,並且由K的定義,吾人建議外加一個真空抽氣系統降低潤濕時孔洞內的空氣壓力,將可視為物理性的潤濕劑,提高鍍液潤濕能力。


    Because the trenches or vias of IC interconnect are very tiny and have large aspect ratio, how to deposit copper without void formation is very important. Development of numerical method from FDM、FEM to BEM or even Free-Element Method enable us to get approximate solution of governing equations, although an analytical solution is impossible to obtained. In this research, the fundamental electrochemical theories are coupled with suitable assumptions to simulate the dynamic deposition profile in electrodeposition of IC copper interconnect. Boundary element method coupled with moving boundary algorithm is used to solve the governing equations. Furthermore, we also formulated a hydrostatic equation to estimate the extent of electrolyte penetrating into sub-micron via. A dimensionless number K is introduced as a wetting indicator.
    It is predicted that without additives, a seam-type void can be formed. It also shows that lower applied current density, lower aspect ratio trench or higher cupric ion concentration favors void size reduction. Furthermore, shape of the trench is also influential. W1/W2 (ratio of width at trench's opening to that at its bottom) should be smaller than unity for better current distribution. As for wetting, increasing dimensionless number K is beneficial to electrolyte's wettability. Adding surfactant or reducing the pressure can all increase K, so reducing the pressure can be viewed as a "physical" wetting agent. Further wetting-time calculation shows that the electrolyte would penetrate into trench so fast that time required for complete wetting is negligible.

    Abstracts 1 List of Contents 2 List of figures 4 List of tables 5 List of Symbols 6 Chapter 1、Introduction 9 Chapter 2、Paper Review and Fundamental Theories in Electrodeposition Simulation 12 2-1、Size scales in simulating of sub-micron copper deposition 12 2-2、Fundamental theories in electrodeposition 15 2-3、Potential Theory Model 17 2-4、BEM for Moving Boundary Problems in Feature Scale Modeling 21 Chapter 3、Numerical techniques in simulation 26 3-1、Boundary Element Method 26 3-1-1、Fundamental Solution of BEM 26 3-1-2、Laplace equation solved by constant element method 28 3-1-3、Gauss-Quadrature Integral 31 3-2、Moving Boundary Algorithm 33 3-2-1、Cubic – Spline Interpolation 34 3-2-2、Secant Method 37 3-2-3、Matrix solver : Gauss – Seidel Method 37 Chapter 4、Results and Discussions of Feature Scale Simulation for IC Copper Interconnection Fabrication 40 4-1、Governing Equations of the Model 40 4-2、Flow chart of numerical solver 46 4-3、Results and Discussions (I) – Feature Scale Simulation 50 4-4、Results and Discussions (II) - Electrolyte’s Wettability 57 4-4-1、Why considering wettability? 57 4-4-2、Derivation of wetting equation for sub-micron via 57 4-4-3、Time required for completely wetting 64 4-5、Conclusions 67 Chapter 5、Future Works 68 5-1、Deposition experiment 68 5-2、Feature scale simulation of deposition in the presence of additives 70 References 71

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