研究生: |
楊宜斌 Yang, Yi-Ping |
---|---|
論文名稱: |
具有回授控制機制的超高頻Class Phi 2直流-直流電源轉換器 UHF Class Phi 2 DC-DC Converter with Feedback Control Mechanism |
指導教授: |
徐碩鴻
Hsu, Shuo-Hung |
口試委員: |
劉怡君
黃國威 |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering |
論文出版年: | 2019 |
畢業學年度: | 107 |
語文別: | 中文 |
論文頁數: | 113 |
中文關鍵詞: | 電源轉換器 、疊接反向器 、壓控振盪器 、覆晶 、回授電路 |
外文關鍵詞: | Converter, cascode inverter, voltage-controlled-oscillator, flip chip, Feedback Control Mechanism |
相關次數: | 點閱:2 下載:0 |
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現今的電源轉換器皆以提高功率密度和轉換效率作為主要的發展目標,本研究提出了使用Class Φ2諧振式架構的直流-直流升壓轉換器,能夠藉由提高開關的切換頻率來減少晶片面積,提升功率密度,諧振式的架構能使開關在切換時達成零電壓切換的效果,在高頻切換時提升轉換效率。本次研究完成了三個Class Φ2直流-直流轉換器,原本的切換頻率皆設定為500 MHz,但由於電路中的DC Block電容出現自振頻過低的問題,量測時,架構一和架構二的切換頻率降為350 MHz,架構三則降為460MHz。架構一和架構二的閘極驅動器皆為疊接反向器,但架構一和架構二的整體晶片佈局方式不同,而架構三的閘極驅動器採用的是能自己產生信號源的壓控振盪器。最後的量測結果,架構一和架構二的最高輸出功率為2.45W和3.91W,而最高的轉換效率為61.8%和62.2%。架構三的最高的輸出功率為1.62W, 而最高的轉換效率為46.5%。
此次設計的轉換器使用了三種不同的製程,分別為氮化鎵HEMT、CMOS和IPD,使用覆晶的方式將不同的製程整合在一起。由於氮化鎵材料具有寬能隙、高臨界電場及高電子遷移率等重要特性,因此非常適合用於轉換器的電晶體開關和二極體元件,而由於CMOS製程成本低廉且可設計較複雜的電路,閘極驅動器皆使用CMOS製程製作。大面積的被動元件以IPD製程製作來節省晶片成本,且在電感部分使用了Dense-Tapered螺旋電感的佈局方式,使其能減少損耗,提升品質因素。
本研究額外設計了一個回授電路,此回授電路能靠著調整閘極驅動訊號的工作週期大小來維持固定的輸出電壓,模擬結果顯示未加回授電路時,不同負載下的輸出電壓差距為1.6V,而加上回授電路後,輸出電壓的差距降低到0.1V。
In recent years, the designs of power converters are aimed at improving power density and efficiency. This thesis presents a Class Φ2 DC-DC boost converter, which can reduce the chip size and power density by increasing the switching frequency. The class Φ2 resonant topology enables the switch to achieve zero voltage switching which can increase the efficiency during high frequency switching. In this thesis, three Class Φ2 DC-DC converters were completed. The original switching frequency was set to 500 MHz. However, due to issue the low self-resonant frequency of the DC block capacitor in the circuit, the switching frequency of work1 and work 2 is reduced to around 350 MHz, and work 3 is reduced to around 460 MHz when the circuit was measured. The gate drivers of both work 1 and work 2 are cascode inverters, but the layouts of work 1 and work 2 are different. Also, a CMOS based voltage-controlled-oscillator has been designed as the signal source as the gate driver, which is used in work 3. In the measurement results, the maximum output power of work 1 and work 2 is 2.45W and 3.91W, and the highest efficiency is 61.8% and 62.2%. The highest output power of work 3 is 1.62W, and the highest efficiency is 46.5%.
The Class Φ2 DC-DC converter uses three different processes, GaN HEMT, CMOS and IPD, and we use flip chip to integrate them. Gallium nitride materials have excellent characteristics such as wide energy gap, high critical electric field and high electron mobility, which is suitable as transistor switches and diode components of the converter. The gates drivers are designed and fabricated in CMOS to take the advantages of higher circuit complexity and low cost. On the other hand, the Integrated Passive Device (IPD) process is employed for large-area passive devices such as inductors and capacitors for high quality factor and also low cost. Note that the inductors of the IPD process are the dense-tapered spiral inductors, which can reduce losses and improve the quality factor of the inductors.
Additionally, in order to sustain a constant output voltage, a feedback circuit is proposed. This feedback circuit allows to obtain a constant output voltage by adjusting the duty cycle of the gate driver signal. The simulated results show that without the feedback circuit, the difference of output voltage between different loads is 1.6V and with the feedback circuit, the difference can be reduced to only 0.1V.
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