本論文設計一個以TSMC 2P4M 0.35微米CMOS製程技術來實現10位元、10K取樣頻率的連續漸近式類比數位轉換器，主要電路區塊包含比較器(comparator)、取樣保持電路(sample and hold)、類比數位轉換器(DAC)以及數位控制電路(digital control circuit)。下線回來後利用CIC所提供類比量測系統量測，當輸入100Hz之訊號，取樣頻率為10K時，可解出7.61位元。整個類比數位轉換器面積為462×842um2，在供應電壓為3伏特時消耗電流為240uA。
　　本論文所設計的連續漸近式類比數位轉換器，主要目的是希望與之前所CMOS MESMS類比輸出加速度計晶片整合，使輸出訊號由類比轉為數位輸出，再以IIC介面整合，使整體晶片功能完善。

This work presents a 10Ks/s 10-bit successive approximation analog-to-digital converter which is realized in a 0.35um CMOS process. The design combines an input offset storage latch-comparator, a sample and hold, a resistor-capacitor array DAC, and SAR digital logic while consuming less than 720uW with a 3.0V power supply. The experimental results show that the effective number of 7.61 bits with 10Ks/s and 100Hz signal frequency.
Main purpose of the whole circuit is integrating into CMOS MESMS accelerometer and IIC interface circuit.

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