本論文以氧化鋅薄膜當作薄膜電晶體元件的主動層，結構是由原子層化學氣相沉積（ALD）所沉積之氧化鋅和射頻濺鍍氧化鋅堆疊所組成。結合ALD氧化鋅具有較均勻成膜及低電阻、高載子遷移率的特性，和射頻濺鍍氧化鋅具備低漏電流及高開關比之優點，期望在不影響關電流之條件下，藉由ALD薄膜來改善主動層和閘極氧化層間界面的性質，取得最佳電性。
由實驗結果得知，在閘極氧化層上先沉積一層極薄的ALD氧化鋅在鍍製上射頻濺鍍氧化鋅之堆疊結構，可有效改善元件電性，其開關電流比由純射頻濺鍍氧化鋅的1.78×10^7增加到4.5×10^7，臨界電壓由19 V降至13 V，且次臨界擺幅及場效載子遷移率也有改善現象，此證明了界面間得到了有效修補。而在鍍製好射頻濺鍍氧化鋅後所作的退火處理，能在更進一步降低其臨界電壓至7.5 V，其它元件量測之電性參數也得到些許提昇。

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