2008年時，IBM提出儲存級記憶體的概念，從那時起開始有一些新型態記憶體問世，這些記憶體同時兼具了操作速度快及非揮發的特性，有效縮減了以往揮發性記憶體及傳統非揮發性記憶體之間的差距。在這之中，鐵電電晶體展現出讀取非破壞性、高開關比以及相容於CMOS製程等優勢，在儲存級記憶體中佔有一席之地。
現今的鐵電電晶體討論主要都是以n型為主，由於p型在先天上具有較小的記憶視窗，因此鮮少被人討論，不過在特定的應用層面中p型鐵電電晶體仍是不可或缺的，因此需要對p型鐵電電晶體做更深入的研究，以降低n型及p型之間的差異。本研究在鐵電層及矽基板之間沉積一層氮氧化鋁介面層，提升p型鐵電電晶體的記憶視窗到將近2V的等級，同時也在量測時使用脈波量測法改善不理想的讀取破壞問題。p型鐵電電晶體因為電荷捕捉效應能被抑制，因此相較於n型具有較好的耐用度及較輕微的印記效應。
除了基礎的特性討論之外，本研究也討論了突觸元件的應用。鐵電電晶體相較於其他種類的突觸元件，具有較多的狀態數、較高的Gmax/Gmin比例，以及較好的線性度表現。本研究討論了n型及p型鐵電電晶體的長程可塑性，而p型鐵電電晶體更是在手寫辨識上展現出將近90%的辨識率。在本研究的最後也對n型及p型鐵電電晶體測試了建構在脈衝神經網路上的脈衝依賴時序可塑性，而這也代表鐵電電晶體在下一個世代的神經型態運算中非常具有潛力。

In 2008, IBM Research Center proposed the concept of storage class memory (SCM). From then on, several emerging memories have been proposed. These memories have attracted intensive attention due to the high speed operation and non-volatility, effectively shrinking the gap between volatile memories and traditional non-volatile memories. Among these SCMs, ferroelectric field-effect transistors (FeFETs) show the competitive advantages in terms of non-destructive reading operation, high on/off ratio, and the compatibility of CMOS process, becoming the promising candidate for future SCM.
Currently most researches on FeFET memory concentrate on n-channel devices in the literature because p-channel FeFETs are believed to have a smaller memory window (MW). However, p-channel FeFETs are indispensable in some circuit applications and therefore it is a prerequisite to study the performance of p-channel FeFETs in more detail to reduce the difference between p- and n-channel FeFETs. In this thesis, depositing an AlON interfacial layer between the ferroelectric film and Si substrate is proposed in p-channel FeFETs to enlarge the MW as large as 2 V which is measured by pulsed Id-Vg method to void possible disturb issue. P-channel FeFETs also exhibit superior characteristics to the n-channel counterparts in terms of better endurance and smaller imprint due to suppressed charge trapping effect.
Besides basic characterizations on FeFET memory performance, the applications to synaptic devices are also discussed in the thesis because FeFETs possess the capability to display more conductance states, higher Gmax/Gmin ratio, and better linearity than other emerging memory technologies. Long-term plasticity of n- and p-channel FeFETs are measured and the recognition accuracy of ~90% in handwritten system is achieved by p-channel FeFETs. Finally, spike timing dependent plasticity (STDP) which is a kind of training method based on spiking neural network (SNN) is also tested for FeFETs and the results demonstrate that FeFETs hold the potential for next-generation neuromorphic computing.

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