目前在IC設計的應用中，強調可攜性以及長時間使用等，因此低功率、低成本、小面積以及快速等等條件越來越被要求。因此，近來的研究，越來越專注於使用互補式金屬半導體氧化物的製程，並且將數位與類比實現在同一製程。在低頻類比電路中，可變增益放大器扮演著一個重要的角色，往往是因為系統對於線性度、增益範圍等的要求，因此，設計出一個具有對數線性的可變增益放大器是必須的。
往往電路會因為一些例如溫度、元件不匹配等因素，而讓其在輸出時有直流偏移，這樣的現象會讓下一級電路進入非線性區間，使其不在原本應有的操作範圍內，為了要避免這樣的現象，本設計也將設計出一個用數位訊號控制的直流偏移校迴路來改善上述現象。

此論文實現一個互補式金屬半導體氧化物的數位控制可變增益放大器。此可變增益放大器採用衰減式電流放大器的特性來達到改變電流增益的功用；基於量測的便利性，增加一個電流對電壓轉換器以及一個電壓對電流轉換器。此外採用以數位電路為主的直流偏移電壓自我校正迴路來減少電路輸出的直流偏移電壓。這一個迴路包含兩部份，SAR迴路去處理純粹的直流訊號所造成的輸出直流偏移電壓，Accumulation 迴路去處理交流訊號所造成的輸出直流偏移電壓。

此晶片採用台積電0.18 µm互補式金屬半導體氧化物製程並且總共佔1023 × 1023 μm2。此可變增益放大器可以提供51 dB的增益範圍，且以5.1 dB為一個間距，頻寬大於10 MHz。在1.8 V的電源供應器之前提下，此晶片共消耗11.45mA的電流。總諧波失真在輸入訊號頻率在1 MHz和輸出擺幅在400mVppd下，在最小增益時為-46.75 dB。輸入雜訊為3.36 nv/rtHz 在增益為最大時。在直流偏移電壓自我校正迴路正常遭操作下，輸入30 mV的直流偏移電壓，在最大增益時，輸出直流偏移電壓可小於30 mV。

This thesis implements a complementary metal oxide semiconductor (CMOS) linear-in-dB VGA with digitally controlled gain. This VGA adopts the degeneration- type current amplifier to vary current gain. A voltage-to-current converter and a current-to-voltage converter are added for measurement convenience. And a digital-based DC offset calibration loop is proposed to achieve the DC offset cancellation.

An experimental chip is fabricated in TSMC 0.18 µm CMOS process and its total area 1023 × 1023 μm2. The VGA provide 51 dB gain range with 5.1 dB step and more than 10 MHz bandwidth. The current consumption from a single 1.8 V supply is less than 11.45 mA. The total harmonic distortion (THD) is small than -46.75 dB at the minimum gain setting when input signal is 1-MHz sinusoidal waveform with 400mVppd swing. The input referred noise is 3.36 at maximum gain setting. The output DC offset after calibration is less than the 30mV when 30 mV input DC offset is applied.

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