現今單晶片（System on Chip, SoC）的設計中，數百個核心與矽智財(Intellectual Property, IP) 可被整合到單一晶片上。為適應高效能的互連架構，越來越多設計採用前瞻的互連架構協定，其支援新穎的平行處理機制，可在尚有未完成之transaction (outstanding transaction) 的情況下發送下一筆transaction，並且允許transaction不按照發送順序的完成。要實現這些新穎的機制，一個主控矽智財 (master IP) 會為每一筆transaction指定一個識別碼 (ID) 來決定transaction需不需要按照發送順序完成。然而，這些前瞻的協定可能會導致在傳統的協定下不會發生的死結問題。為防止死結問題，目前存在的解決方案會偵測並暫時停止發送有可能造成死結的transaction，這樣的方法非常容易導致嚴重的效能損失。在本文中，我們提出一個創新的方法來分配識別碼，此方法能保證發出的transaction不會造成死結，並且顯著的減少暫停發送transaction的次數。我們的實驗結果展現出令人鼓舞的效能增進並且相較於現有的研究只需要增加極少的硬體。

In a modern System on Chip (SoC) design, hundreds of cores and Intellectual Properties (IPs) can be integrated into a single chip. To be suitable for high-performance interconnects, designers increasingly adopt advanced interconnect protocols which support novel mechanisms of parallel accessing including outstanding transactions and out-of-order completion of transactions. To implement those novel mechanisms, a master tags an ID to each transaction to decide in-order or out-of-order properties. However, these advanced protocols may lead to a deadlock problem that does not occur in traditional protocols. To prevent the deadlock problem, current solutions stall suspicious transactions and in certain cases, many such stalls can cause serious performance penalty. In this paper, we propose a novel ID assignment mechanism which guarantees the issued transactions to be deadlock-free and results in significant reduction in the number of stalls. Our experimental results show encouraging performance improvement compared to previous works with little hardware overhead.

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