研究生: |
謝祥文 |
---|---|
論文名稱: |
區域分割為基礎之晶圓缺陷圖樣辨識演算法 Sub-Region Based Wafer Defect Map Pattern |
指導教授: | 陳飛龍 |
口試委員: | |
學位類別: |
博士 Doctor |
系所名稱: |
工學院 - 工業工程與工程管理學系 Department of Industrial Engineering and Engineering Management |
論文出版年: | 2004 |
畢業學年度: | 93 |
語文別: | 中文 |
論文頁數: | 114 |
中文關鍵詞: | 良率提升 、缺陷圖樣辨識 、區域分割 、最小矩型區域 |
外文關鍵詞: | yield enhancement, defect map pattern, Sub-Region, Minimum Rectangle Area |
相關次數: | 點閱:2 下載:0 |
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近幾年來半導體技術快速的發展,如何有效控制製程的變異及找出發生製程變異的原因,對其良率提升具有決定性的影響。而當製程發生變異時,最直接的偵測方式之一即是分析晶圓的缺陷圖樣,並藉由缺陷圖樣追蹤可能發生的製程異常,過去在缺陷圖樣這方面的研究,主要是從兩大方向來進行:統計分析及人工智慧的方式。統計分析的方法可有效地偵測出晶圓上可能發生聚集的現象,但是必須在某一假設分配下,來判定聚集現象的類型,也因此限制了缺陷圖樣辨識的應用性。就人工智慧方法而言,則可藉由收集具代表性的缺陷圖樣來進行學習,以進行缺陷圖樣的辨識,然而缺陷圖樣的變異性大,當從晶方或是缺陷層面直接設計訓練樣本,若無法有效控制缺陷圖樣在方向及位置上的差異,以及當產品設計變動時,訓練樣本必須重新設計,因此限制此法在應用上的效果。有鑑於此,本研究提出利用區域分割的概念發展缺陷圖樣分析架構,以分析晶圓上的缺陷圖樣,此方法主要分為四大部分:一是設計影像處理遮罩,定義晶圓上缺陷的位置及大小,第二部份利用區域分割及最小矩形區域概念,定義晶圓上的缺陷群聚區域,三是建構模糊推論系統來呈現晶圓陷圖樣的,第四部份利用信號處理的特性,來輔助進行晶圓缺陷的辨識。本研究進行測試時,以國內半導體廠商所提供的缺陷圖樣測試資料為參考,目前研究成果顯示,本研究所提出的晶圓缺陷圖樣分析架構,可定義出晶圓上的環狀、刮傷、區塊聚集型及重複性的缺陷圖樣。
ABSTRACT
Process variation control and root causes elimination are critical to the issue of yield enhancement in semiconductor manufacturing industry. To detect the existence of process variation, one of the most effective ways is to analyze the spatial defect patterns exhibiting on the wafers. Many research works have been proposed to help recognize the spatial patterns. These works can basically be classified into statistical approach and training based approach. In statistical approach, the defect data are statistically analyzed to find out the clustering phenomena, and it usually cannot conduct further analysis to identify the specific defect patterns under certain statistical hypothesis. Comparing to the statistical approach, the training based approach has the capability of classifying different spatial defect patterns. But it requires the collection of enough training samples, which is usually very time-consuming. Moreover, when the product or process changes, the training process needs to be executed again. For these reasons, this research developed a Sub-Region based pattern recognition algorithm to identify and classify ring, scratch, zone, and repeating type defect map patterns such that human intervention can be replaced. The presented analysis architecture comprises of four modules: defect localization and noise reduction, defect clusters representation by Sub-Region and Minimum Rectangle Area (MRA), defect map pattern identification, and defect map pattern recognition. The experimental results show that the presented approach can achieve the intended purposes.
李偉傑,「半導體之工程資料分析與診斷系統」,碩士論文,國立清華大學工業工程與工程管理學系研究所(1995)。
林寅智,「以工程資料為基礎之半導體故障分析系統」,碩士論文,國立清華大學工業工程與工程管理學系研究所(1997)。
莊達人,VLSI製造技術,高立圖書有限公司,1997年。
劉淑範,「以工程資料為基礎之半導體良率提升分析系統」,碩士論文,國立清華大學工業工程與工程管理學系研究所(1997)。
林景堂,「晶圓圖像辨識」,碩士論文,國立台灣大學資訊工程學系研究所(1998)。
Anil K. J., Robert P. W., and Jianchang M., “ Statistical Pattern Recognition: A Reviewion,” IEEE Transactions on Pattern Analysis and Machine Learning, Vol. 22, No. 1, 4-37(2000).
Badih, E. K., SEMI Your Industry Resource, Semiconductor Conference TAIWAN, 77-97(1997).
Bezdek, J., Pattern recognition with fuzzy objective function algorithm, Plenum, New York (1998).
Bandyopadhyay, S., Murthy, C.A., and Pal S.K.,“ Pattern Classification with Genetic Algorithm,” Pattern Recognition Letters, Vol. 16, 801-808(1995).
Chao, C. J. and Cheng, F. P., “Fuzzy Pattern Recognition Model for Diagnosing Cracks in RC Structures,” Journal of Computing in Civil Engineering, Vol. 12, No. 2, 111-119(1998).
Chen, F. L. and Liu, S. F., “A neural-network approach to recognize defect spatial pattern in semiconductor manufacturing,” IEEE Transactions on Semiconductor Manufacturing, Vol. 13, No. 3, 366-373(2000).
Collica, R. S., “The Physical Mechanisms Of Defect Clustering And Its Correlation To Yield Model Parameters For Yield Improvement”, IEEE/SEMI Advanced Semiconductor Manufacturing Conference, 1990, pp.91-94.
Cristiano, J. M., and Bauchspiess, A., “Fuzzy Inference System Applied to Edge Detection in Digital Images,” In Proceedings of the V Brazilian Conference on Neural Network – V Congresso Brasileiro de Redes Neurais, Rio de Janeiro, Brazil, April 2-5, 2001.
Cunningham, J. A., “The Use and Evaluation of Yield Models in Integrated Circuit Manufacturing”, IEEE Transactions On Semiconductor Manufacturing, Vol.3, No.2, May 1990, pp.60-71.
Cunnningham, S. P., Spanors, C. J. and Katalin, V., “Semiconductor Yield Improvement: Results and Best Practices”, IEEE Transactions On Semiconductor Manufacturing, Vol.8, No.2, May 1995, pp.103-199.
Cunningham, S. P. and MacKinnon S., “Statistical Methods for Visual Defect Metrology”, IEEE Transactions On Semiconductor Manufacturing, Vol.11, No.1, February, 48-53(1998).
Devroye, L., Gyorfi, L., and Lugosi, G., A Probabilistic Theory of Pattern Recognition, Springer-Verlag, Berlin, 1996.
Duda, R. O., and Hart, P. E., Pattern Classification and Scene Analysis, John Wiley &Sons, New York, 1973.
Ferris-Prabhu, A. V., “A Clustered-modified possion model for estimating defect density and yield,” IEEE Transactions on Semiconductor Manufacturing, Vol. 3, 54-59(1990).
Friedman, D. J., M. H. Hansen, V. N. Nair, and D. A. James, “Model-free estimation of defect clustering in integrated circuit fabrication,” IEEE Transactions on Semiconductor Manufacturing, Vol. 10, 344-359(1997).
Horton, P., and Nakai, K., “A Probabilistic Classification System for Predicting the Cellular Localization Site of Proteins,” Intelligent Systems in Molecular Biology, 109-115(1996).
Jain, A. K., and Mohiuddin, K. M., “Artificial Neural Networks: A Tutorial,” Computer, 31-44(1996).
Kaempf, U., “The Binomial Test: A Simple Tool To Identify Process Problems”, IEEE Transactions On Semiconductor Manufacturing, Vol. 8, No. 2, 160-165(1995).
Ken, R., Brain, S., and Neil, H., ”Using Full Wafer Defect MAPs As Process Signatures To Monitor And Control Yield”, IEEE/SEMI Semiconductor manufacturing Science Symposium, 129-135(1991).
Liang, L., Basallo, E., and Looney, C., Proc. ISCA 14th Int. Conf., Las Vegas, 279-284, 2001.
Linkens, D. A. and Afzalian, A., “A New Fuzzy Logic Power System Stabiliser (PSS), ” Proceedings of the 4th European Congress on Intelligent Techniques and Soft Computing, Aachen, Germany, September, 1999 – 2003(1996).
Lee, C., cFuzzy Logic in Control Systems: Fuzzy Logic Controller, Parts I and II,” IEEE Trans. Syst., Man & Cybern., Vol. 20, 404-435(1990).
Luciano, N., and Giacomo Patrizi, “Formal Methods in Pattern Recognition,” European Journal of Operation Research, 120, 459-495(2000).
Meyer, F. J. and D. K. Pradhan, “Modeling defect spatial distribution,” IEEE Transactions on Computers, Vol. 38, 538-546(1989).
Mieno, F.; T. Sato, Y. Shibuya, K. Odagiri, H. Tsuda, and R. Take, “Yield improvement using data mining system Semiconductor Manufacturing “IEEE International Symposium on Conference Proceedings, 1999, pp. 391 –394.
Mirza, A. I., Donoghue, G. O’, Drake, A. W., and Graves, S. C., “ Spatial Yield Modeling for Semiconductor Wafers”, IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp. 276-281, 1995.
Nieddu, L. and G. Patrizi, “Formal methods in pattern recognition: A Review,” European Journal of Operational Research, Vol. 120, No. 3, 459-495(2000).
Pandya, A.S., and Macy, R.B., Pattern Recognition With Neural Networks in C++, IEEE Press, 1994.
Park, H., Rhee, S., and Kim, D., “A fuzzy pattern recognition based system for monitoring laser weld quality,” Measurement Science and Technology, Vol. 12, 1318-1324(2001).
Ross, T. J., Fuzzy Logic With Engineering Applications, McGraw-Hill, New York, 1995, pp. 136-146.
Sato, H., M. Ikota, A. Sugimoto and H. Masuda, “A new defect distribution metrology with a consistent discrete exponential formula and its applications” IEEE Transactions on Semiconductor Manufacturing, Vol. 12, No. 4 , 409 –418(1999).
Schalkoff, R., Pattern Recognition: Statistical, Structural and Neural Approaches, Wiley, New York, 1992.
Stapper, C.H., “On yield, fault distributions, and clustering of particles”, IBM Journal Of Research Develop., Vol. 31, 326-338(1986).
Sugeno, M., “An Introductory Survey of Fuzzy Control,” Inf. Sci., Vol.36, 59-83(1985).
Taam, W., and Hamada, M., “Detecting Spatial Effects from Factorial Experiments: An Application from Integrated-circuit Manufacturing”, Technometrics, Vol. 35, No. 2, (1993)
Tyagi, A. and M. A. Bayoumi, “Defect clustering viewed through generalized poisson distribution,” IEEE Transactions on Semiconductor Manufacturing, Vol. 5, 196-206(1992).
Vapnik, V. N., Statistical Learning Theory, John Wiley & Sons, New York, 1998.
Weber, C., Moslehi, B., and Dutta, M., “An Integrated Framework For Yield Management and Defect / Fault Reduction,” IEEE Transactions On Semiconductor Manufacturing, Vol. 8, No. 2, 110-120(1995).
Wong, A. Y., “A statistical parametric and probe yield analysis methodology,” Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 131-139(1996).