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研究生: 朱偉玓
Chu, Wei-Di
論文名稱: 一個應用於有機無機層感測元件上具有低雜訊之截波穩定型讀出電路
A Low Noise Readout IC with In-Pixel Chopper Stabilization for Organic Image Sensor
指導教授: 謝志成
Hsieh, Chih-Cheng
口試委員: 陳新
Chen, Hsin
鄭桂忠
Tang, Kea-Tiong
洪浩喬
Hong, Hao-Chiao
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2018
畢業學年度: 106
語文別: 英文
論文頁數: 64
中文關鍵詞: 低雜訊電容跨阻抗放大器截波穩定有機光導薄膜影像感測器
外文關鍵詞: Low noise, CTIA, Chopper stabilization, Organic photoconductive film, Image sensor
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  • 本論文提出一個可應用於有機無機層感測元件(Organic Photoconductive Film)與需要穩定偏壓之感測元件的截波穩定型讀出電路,具有低雜訊(Low Noise)與高轉換增益(High Conversion Gain)的特性。
    為了達到較好的雜訊表現,本論文所使用的電容反饋跨阻抗放大器(Capacitive Trans-Impedance Amplifier)配合像素內雙重關聯式取樣電路(In-Pixel Correlated Double Sampling)有效地消除了重置開關在重置完畢瞬間所取樣到的熱雜訊(Thermal Noise)以及電容反饋跨阻抗放大器的偏移電壓。而電路在長時間積分下所引進的閃爍雜訊(Flicker Noise)則是使用截波穩定技術(Chopper Stabilization Technique),將低頻的閃爍雜訊移至選定的截波頻率(Chopper Frequency),並且再配合後端的二階式雙斜率型類比數位轉換器(Two-Step Dual-Slope Analog to Digital Converter)對訊號做多重式取樣(Multiple Sampling),取樣後的多筆資料最後再由一個截止頻率在截波頻率之下的數位低通濾波器(Digital Low-Pass Filter)做處理,進而壓抑被調變至高頻的閃爍雜訊。
    此架構使用0.18微米1P6M互補式金氧半導體製程檔進行模擬,設計並擁有64×64像素陣列並搭載上述構想的讀出電路原型,操作在類比端及數位端3.3伏特之下。模擬結果為:在60張的每秒顯示幀數下,達到99.9%線性度,並且提高訊號雜訊比(SNR)從50.18dB至53.05dB。


    This thesis presents a low noise and high conversion gain readout IC with chopper stabilization technique for organic photoconductive film image sensor and a fixed biasing needed image sensor.
    To achieve a nice noise performance, the proposed capacitive trans-impedance amplifier (CTIA) with in-pixel correlated double sampling (CDS) cancels the offset of CTIA and suppresses the reset phase thermal noise which is induced by reset switch and OP. On the other hand, chopper stabilization technique is also applied to modulate flicker noise to the chopping frequency for the purpose of separating low frequency noise with low frequency signal. After that, signals are readout with multiple sampling by column-wise two-step dual-slope analog to digital converters. Finally, digital low-pass filter (LPF), which cut-off frequency is designed to be much lower than chopping frequency, is used to process the collection of data of each pixel to filter out thermal noise and modulated flicker noise.
    A prototype of 64×64 pixel imager employed these schemes has been designed and simulated in 0.18um 1P6M CMOS technology file with 3.3V supply voltage for both of analog and digital. The simulation results show that the proposed chopper stabilized CTIA ROIC achieves 99.9% linearity and improves SNR from 50.18dB to 53.05dB.

    Abstract ii Contents iii List of Figures vi List of Tables ix Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Contribution 2 1.3 Thesis Organization 3 Chapter 2 Background Information 5 2.1 Characteristic of Organic Sensor 6 2.2 Review of CMOS Image Sensor 6 2.2.1 Basic Sensor Characteristics 7 2.2.1.1 Array Size 7 2.2.1.2 Frame Rate 7 2.2.1.3 Integration Time 7 2.2.1.4 Noise 8 2.2.2 Basic Noise Cancellation Techniques 8 2.2.2.1 Correlated Double Sampling (CDS) 8 2.2.2.2 Double Delta Sampling (DDS) 9 2.3 Pixel Structure Selection 9 2.3.1 3-Transistor (3T) Active Pixel 9 2.3.2 Capacitive Trans-Impedance Amplifier (CTIA) Pixel 10 2.3.3 Summary 12 2.4 Design Consideration of CTIA Pixel 12 2.4.1 Reset Phase Noise 13 2.4.2 Exposure Phase Noise 13 2.5 Summary 16 Chapter 3 Low Noise CTIA with CS and In-Pixel CDS 18 3.1 In-Pixel CDS 18 3.2 Chopper Stabilization (CS) 21 3.2.1 Chopping Principle 21 3.2.2 Non-Ideal Effects 23 3.3 Multiple Sampling (MS) 28 3.4 Summary 30 Chapter 4 Prototype Implementation of Low Noise ROIC 31 4.1 System Architecture of Proposed ROIC 31 4.2 In-Pixel Circuit 33 4.2.1 CTIA with Chopper Design 34 4.3 Column-Shared Circuit 37 4.3.1 Column Buffer 37 4.3.2 Two-Step Dual-Slope ADC 38 4.3.3 6-bit Counter and Latch 40 4.4 Array-Shared Circuit 41 4.4.1 Stair-Step Voltage Ramp Generator 41 4.4.2 Row and Column Select Circuits 42 4.5 Chip Operation 42 4.6 Summary 44 Chaper 5 Simulation Results 46 5.1 OP-amps and ADC 46 5.2 Non-Ideal Effect of CTIA with Chopper 48 5.2.1 CTIA Output Voltage Dropping 48 5.2.2 CTIA Offset 49 5.2.3 CTIA Linearity 49 5.3 NOISE Simulation 51 5.3.1 CTIA Noise Performance 51 5.3.1.1 In-Pixel CDS 51 5.3.1.2 Chopper Stabilization 53 5.3.2 Column Buffer Noise Performance 54 5.3.3 Signal Path Noise Performance 54 5.4 Discussion 55 5.5 Summary 57 Chapter 6 Conclusion and Future Work 59 6.1 Conclusion 59 6.2 Future Work 60 Bibliography 62

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