探討利用原子層化學氣相沉積法鍍製Al2O3、HfO2之高介電結構薄膜，應用在奈米尺度世代DRAM影響之電性研究

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研究生：	簡銘萱 Ming-Hsuan Chien
論文名稱：	探討利用原子層化學氣相沉積法鍍製Al2O3、HfO2之高介電結構薄膜，應用在奈米尺度世代DRAM影響之電性研究 Electrical properties of Al2O3-HfO2 dielectric capacitors using atomic layer deposition in metal-insulator-metal configuration
指導教授：	吳泰伯 Tai-bor Wu
口試委員:
學位類別：	碩士 Master
系所名稱：	工學院 - 材料科學工程學系 Materials Science and Engineering
論文出版年：	2007
畢業學年度：	95
語文別：	中文
論文頁數：	100
中文關鍵詞：	原子層化學氣相沉積、高介電薄膜
外文關鍵詞：	Atomic Layer Deposition, Metal-insulator-metal, DRAM
相關次數：	點閱：2 下載：0
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本實驗以原子層化學氣相沉積法(Atomic layer chemical deposition, or ALCVD)鍍製高介電薄膜，因ALCVD具有極佳的厚度控制能力、均勻覆蓋能力以及低鍍膜溫度等優點，為許多鍍製超薄膜方法中最具吸引力的。在鍍製Al2O3和HfO2時採用TMA (Trimethylaluminum)作為Al的先趨物，TEMAH (tTetrakis(ethylme))作為Hf的先趨物，兩者皆以H2O作為氧化劑。
本實驗使用MIM(Metal-Insulator-Metal)電容結構，以避免MIS (Metal-Insulator-Silicon)結構於介面形成SiO2而降低電容值的問題。使用的兩種底電極為經In-situ表面電漿處理過Pt基板及TiN基板，採用Au-Ti為上電極。本實驗研究重點在於利用ALCVD鍍製三種不同薄膜結構:分別為(HfO2/Al2O3)*3、HfAlOX及純HfO2結構薄膜，當中HfO2與Al2O3的成分比皆為2:1，薄膜厚度為7.2nm。探討不同結構薄膜電容以及熱處理溫度對電性的影響與研究。

目錄

第一章    序論--------------------------------------------1
 1-1研究背景----------------------------------------------1
 1-2研究動機----------------------------------------------2
 1-3研究目標----------------------------------------------6
第二章    文獻回顧---------------------------------------12
 2-1 嵌入式DRAM技術-------------------------------------12
 2-2 (HfO2/Al2O3)*3、HfAlOX及純HfO2薄膜--------------------13
 2-3 (HfO2/Al2O3)*3、HfAlOX及純HfO2薄膜製備方法------------14
 2-4 原子層化學氣相沉積法(ALCVD)-------------------------17
 2-5 ALCVD技術優缺點-------------------------------------21
 2-6 電極的選擇------------------------------------------23
     2-6-1 Pt電極----------------------------------------23
     2-6-2 TiN電極---------------------------------------25
 2-7 介電分析--------------------------------------------26
     2-7-1 介電常數--------------------------------------26
     2-7-2 介電損失--------------------------------------29
     2-7-3 介電強度--------------------------------------31
 2-8 漏電流----------------------------------------------33
第三章    實驗步驟---------------------------------------51
 3-1 薄膜電容的製作--------------------------------------51
     3-1-1 下電極製作------------------------------------51
     3-1-2 In-situ表面電漿處理---------------------------52
     3-1-3 介電薄膜沉積----------------------------------53
     3-1-4 (HfO2/Al2O3)*3、HfAlOX及純HfO2介電薄膜快速
            熱退火處理-----------------------------------54
     3-1-5 上電極製作------------------------------------54
 3-2 薄膜的量測與分析------------------------------------56
     3-2-1 膜厚量測 -------------------------------------56
     3-2-2 微觀結構--------------------------------------56
     3-2-3 X光光電子能譜分析-----------------------------56
     3-2-4 高溫PDA處理對薄膜結晶情形分析----------------57
     3-2-5高溫處理PDA對薄膜介面原子擴散情形分析—-------57
     3-2-6 介電常數與逸散因子量測------------------------57
     3-2-7 電流-電壓量測---------------------------------57
第四章    結果與討論-------------------------------------69
  4-1 (Al2O3/HfO2)x3、HfAlOx、HfO2高介電薄膜微結構分析-------69

      4-1-1 Pt底電極、TiN底電極上的AFM表面結構分析-----69
      4-1-2 不同結構介電薄膜鍍製在Pt底電極上的AFM表面型態 --------------------------------------------------70
4-1-3 X光光電子能譜分析(XPS)----------------------70
      4-1-4 TEM結構分析---------------------------------71
      4-1-5 GIXRD薄膜結晶分析---------------------------71
4-2 (Al2O3/HfO2)x3、HfAlOx、HfO2高介電薄膜成分分析---------72
      4-2-1 SIMS(Secondary Ion Mass Spectrometer)分析----72
      4-2-2 Auger電子能譜分析----------------------------72
4-3 (Al2O3/HfO2)x3、HfAlOx、HfO2高介電薄膜電性分析----------73
      4-3-1高介電薄膜電性在不同底電極上的表現:J-V--------73
      4-3-2 (Al2O3/HfO2)*3、HfAlOX、HfO2高介電薄膜J-V比較—74
      4-3-3 漏電流隨著PDA溫度變化分析-------------------74
4-3-4 (Al2O3/HfO2)*3、HfAlOX、HfO2高介電薄膜的介電常數/    電容密度與PDA溫度的關係---------------------------75
4-3-5  (Al2O3/HfO2)*3、HfAlOX、HfO2高介電薄膜之逸散因子的表現--------------------------------------------76
第五章    結論-------------------------------------------90
第六章    參考文獻---------------------------------------92

圖目錄
圖1-1 ㄧ九七o年代Intel推出一一o三記憶體----------------7
圖1-2 DRAM的應用範圍-------------------------------------7
圖1-3 記憶體的種類----------------------------------------8
圖1-4電晶體電容型的記憶單元------------------------------8
圖1-5 DRAM電容面積發展-----------------------------------9
圖1-6不同熱處理溫度下poly-Si 表面變化情形----------------9
圖2-1邏輯線路和DRAM製程的示意圖-------------------------38
圖2-2與Si接合後有良好熱穩定性之週期表元素--------------38
圖2-3各種high-k 材料與Si接合之能帶圖-------------------39
圖2-4 CVD系統: 冷腔壁(cold-wall)式和熱槍壁(hot-wall)----40
圖2-5 CVD五種主要反應機制-------------------------------41
圖2-6 APCVD反應設備圖-----------------------------------41
圖2-7 LPCVD反應設備圖-----------------------------------41
圖2-8 PECVD反應設備圖-----------------------------------42
圖2-9 ECRCVD反應設備圖----------------------------------42
圖2-10 表面達飽和狀態------------------------------------42
圖2-11 理想鍍膜cycle數與膜厚成比例----------------------43
圖2-12 ALCVD(a) the growth curve(b) the GPC(c) the change in the GPC(Growth per cycle)--------------------------------43
圖2-13 水平式和垂直式ALCVD反應腔體----------------------44
圖2-14 ALCVD反應機制(以成長Al2O3為例)--------------------45
圖2-15 不同氣流量比例、基板溫度與PtOx相形成的關係-------46
圖2-16 成長半球型晶粒之Si示意圖-------------------------46
圖2-17 材料四種極化機構之示意圖(a)電子極化(b)離子極化(c)固有電矩的轉向極化(d)空間電荷極化--------------------------47
圖2-18 介電質中不同極化機構與頻率之關係------------------48
圖2-19 (a)實際電容之等效電路圖(b)其電壓電流的相位關係圖—48
圖2-20 三種介電損失途徑對頻率變化之關係圖----------------49
圖2-21 能障限制之傳導機制: (a)蕭特基發射(b)穿隧效應------49
圖2-22 本體限制之傳導機制: (a)空間電荷限制傳導 (b)離子傳導
       (c)普爾-夫倫克爾效應------------------------------50
圖3-1 實驗製程流程圖-------------------------------------66
圖3-2 ALCVD製程設備--------------------------------------67
圖3-3 量測分析流程圖-------------------------------------68
圖4-1(a) HfO2介電薄膜鍍製在水氣電漿處理過的Pt底電極上，經過PDA 400oC的AFM表面型態圖(b) HfO2介電薄膜鍍製在TiN底電極上，經過PDA400oC的AFM表面型態圖----------------------------78
圖4-2 (a) PDA溫度600OC，Au-Ti/HfO2/Pt AFM表面型態圖(b) PDA溫度600OC，Au-Ti/HfAlOx/Pt AFM表面型態(c) PDA溫度600OC，Au-Ti/(Al2O3/HfO2)x3/Pt AFM表面型態圖----------------------79
圖4-3 三種不同介電薄膜結構鍍製在Pt底電極上，經過PDA 400oC處理後XPS分析-------------------------------------------80
圖4-4 (a) Au-Ti/(Al2O3/HfO2)x3/Pt疊層介電薄膜結構，在經過PDA 400oC處理以後TEM影像圖(b) Au-Ti/HfAlOX/Pt 混合介電薄膜結構，在經過PDA 400oC處理以後TEM影像圖------------------------80
圖4-5 (a)u-Ti/HfO2/Pt GIXRD分析(b)Au-Ti/HfO2/TiN GIXRD分析---------------------------------------------------------81圖4-6(a) Au-Ti/HfAlOX/TiN GIXRD分析(b) Au-Ti/ (HfO2/Al2O3)*3/ TiN GIXRD分析--------------------------------------------82

圖4-7 (a) (Al2O3/HfO2)x3/ TiN薄膜結構SIMS分析(b) HfAlOx/TiN 薄膜結構SIMS分析------------------------------------------83
圖4-8  (a) (Al2O3/HfO2)x3/ TiN薄膜結構Ti元素之SIMS分析局部圖(b) HfAlOx/TiN 薄膜結構Ti元素之SIMS分析局部圖---------84
圖4-9(a)(Al2O3/HfO2)*3/Pt，as deposited條件下歐傑電子能譜分析(b)(Al2O3/HfO2)*3/Pt 經過PDA 600OC處理後歐傑電子能譜分析-85
圖4-10 三種不同結構介電薄膜在Pt底電極上，經過不同RTA溫度的 J-V關係----------------------------------------------86
圖4-11 三種不同結構介電薄膜在TiN底電極上，經過不同RTA溫度的J-V關係圖---------------------------------------------86
圖4-12 在白金基板上，介電常數/電容密度隨著PDA溫度改變關係圖-------------------------------------------------------87
圖4-13 在TiN基板上，介電常數/電容密度隨著PDA溫度改變關係圖-------------------------------------------------------87
圖4-14 (Al2O3/HfO2)*3、HfAlOX、pure HfO2三種不同結構的介電薄膜鍍製在Pt、TiN底電極上，逸散因子對應PDA溫度的關係圖-----88






表目錄

表1-1數種二元氧化物基本特性-----------------------------10
表1-2數種典型之高介電薄膜材料---------------------------10
表1-3 ITRS2005下世代DRAM電容之介電材料與電極-----------11
表2-1 各種high-k 材料性質比較---------------------------39
表2-2 蒸鍍法(Evaporation)、濺鍍法(Sputter)和分子束磊晶成長(Molecular Beam Epitaxy，MBE)比較表-----------------------40
表2-3 數種金屬與矽之功函數-------------------------------44
表2-4 ALCVD(即表中的AVCD)與一般CVD成長TiN之比較--------47
表3-1 Pt鍍膜條件----------------------------------------59
表3-2 Al先趨物的基本特性--------------------------------59
表3-3 Hf之先趨物基本特性--------------------------------60
表3-4 (Al2O3/HfO2)*3薄膜之ALCVD製程參數------------------61
表3-5 HfAlOX薄膜之ALCVD製程參數-------------------------62
表3-6 pure HfO2薄膜之ALCVD製程參數-----------------------63
表3-7 為(Al2O3/HfO2)x3、HfAlOx、HfO2製程cycle數與厚度-----64
表3-8 ALCVD電漿製程參數----------------------------------64
表3-9 上電極Au-Ti之蒸鍍條件-----------------------------65
表4-1 RMS比較表------------------------------------------89
表4-2 外加電壓-1.2V對應的漏電流比較表-------------------89

                                

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