時序分析一直是電路設計中的一個重要問題。時序分析為了處理集成電路中更多的變異，必須考慮在製造過程中或環境因素所產生的變異，如溫度和電源電壓。這些變異使得進行時序分析更加困難，這直接影響到電路功能的正確性和速度。統計時序分析（SSTA）是一種快速，準確的方法。在SSTA中，收斂路徑導致難以保持典型延遲模型，為了加法及最大值運算的表達，我們改進了緊度（tightness）方法。我們在這篇論文中提出了一個高品質的SSTA引擎。這個引擎比TAU2013時序分析比賽的結果還要好。

Timing analysis has always been an important issue in circuit design. With more variability in integrated circuits, timing analysis must consider the variability in manufacturing or environmental factors, such as temperature and supply voltage. These variabilities make timing analysis more difficult, which directly affect circuit functional correctness and speed. The statistical timing analysis (SSTA) is one approach with fast and accurate results. In SSTA, convergent paths cause difficulty in keeping canonical delay model. In order to capture the expression after sum and maximum operations, we improve the tightness method. In this thesis, a high quality SSTA engine is proposed. This work outperforms the contestants in TAU 2013 variation aware timing analysis contest.

[1] M. Orshansky and A. Bandyopadhyay, “Fast statistical timing analysis handling arbitrary delay correlations,” Design Automation Conference, pp. 337-342, 2004.
[2] A. Ramalingam, A. K. Singh, S. R. Nassif, G.-J. Nam, M. Orshansky, and D. Z. Pan, “An accurate sparse matrix based framework for statistical static timing analysis,” International Conference on Computer-Aided Design, pp. 231-236, 2006.
[3] C. Visweswariah, K. Ravindran, K. Kalafala, S. G. Walker, and S. Narayan, “Firstorder incremental block-based statistical timing analysis,” Design Automation Conference, pp. 331-336, 2004.
[4] L. Zhang, W. Chen, Y. Hu, J. A. Gubner, and C. C.-P Chen, “Correlation preserved non-Gaussian statistical timing analysis with quadratic timing model,” Design Automation Conference, pp. 83-88, 2005.
[5] L. Cheng, 1. Xiong, and L. He, “Non-linear statistical static timing analysis for non-Gaussian variation sources,” Design Automation Conference, pp. 250-255, June 2007.
[6] H. Chang, V. Zolotov, S. Narayan, and C. Visweswariah, “Parameterized block-based statistical timing analysis with non-Gaussian parameters, nonlinear delay functions,” Design Automation Conference, pp. 71-76, June 2005.
[7] K. Kang, B. C. Paul, and K. Roy, “Statistical timing analysis using levelized covariance propagation,” Design, Automation & Test in Europe, pp. 764-769, 2005.
[8] H. Chang and S. S. Sapatnekar, “Statistical timing analysis considering spatial correlations using a single PERT-like traversal,” International Conference on Computer-Aided Design, pp. 621-625, 2003.
[9] Y. Zhan, A. J. Strojwas, X. Li, L. T. Pileggi, D. Newmark, and M. Sharma, “Correlation-aware statistical timing analysis with non-Gaussian delay distributions,” Design Automation Conference, pp. 77-82, 2005.
[10] V. Khandelwal and A. Srivastava, “A general framework for accurate statistical timing analysis considering correlations,” Design Automation Conference, pp. 89-94, 2005.
[11] Z. Feng, P. Li, and Y. Zhan, “Fast second-order statistical static timing analysis using parameter dimension reduction,” Design Automation Conference, pp. 244-249, 2007.
[12] S. Bhardwaj, S. Vrudhula, and A. Goel, “A unified approach for full chip statistical timing and leakage analysis of nanoscale circuits considering intradie process variations,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 10, pp. 1812-1825, October 2008.
[13] J. Singh and S. Sapatnekar, “Statistical timing analysis with correlated non- Gaussian parameters using independent component analysis,” Design Automation Conference, pp. 155-160, 2006.
[14] TAU 2013 Variation Aware Timing Analysis Contest, https://sites.google.com/site/taucontest2013/.
[15] W. C. Elmore, “The Transient Response of Damped Linear Networks with Particular Regard to Wide-Band Amplifiers,” Journal of Applied Physics, vol. 19, no. 1, pp. 55-63, January 1948.