研究生: |
王怡絜 Wang, I-Chiech |
---|---|
論文名稱: |
交錯圖形偵測應用於半導體缺陷圖樣辨識之研究 Detection and Identification of Intersecting Defect Patterns in Semiconductor Manufacturing |
指導教授: | 陳飛龍 |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
工學院 - 工業工程與工程管理學系 Department of Industrial Engineering and Engineering Management |
論文出版年: | 2006 |
畢業學年度: | 94 |
語文別: | 英文 |
論文頁數: | 84 |
中文關鍵詞: | 半導體 、良率 、缺陷分析 、影像處理 |
外文關鍵詞: | Semiconductor, Yield, Defect analysis, Image processing |
相關次數: | 點閱:3 下載:0 |
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半導體的製造過程極為複雜,因此良率的提升成為一項非常具有挑戰性的議題。提昇良率最直接的方法則是專注在製造過程,即時的發現異常情況。透過空間缺陷辨識可以迅速發現線上運作問題。簡言之,偵測以及辨識空間缺陷圖形可以發現問題並且得知問題起因,使工程師可以迅速修復避免良率的損失。
過去的研究中,學者發展出許多方法得以將缺陷圖進行分類辨識,但卻只著重在單一種缺陷型態,而忽略了更具複雜性的交錯圖形。因此,本研究著重在發展一套方法解決交錯型的缺陷圖形,以幫助工程師即時找到問題癥結點。本研究的目的包括: (1) 發展一套方法解決交錯缺陷圖形,包含線性交錯以及弧形交錯, (2) 比較不同的方法對於交錯圖形的辨識表現, (3) 建構完整的系統解決交錯圖形。
本研究之方法透過模擬資料測試以及業界知名半導體公司所提供之缺陷圖測試其績效。透過實證性的測試,證實本研究可以正確辨識出交錯型缺陷圖形,相較於人工辨識時間,本研究方法可以有效的縮短缺陷圖形辨識的時間。
The processes of semiconductor manufacturing have become more complicated and its yield faces a big challenge. Finding the way of improving the yield is a very critical issue. The direct method to enhance the yield should focus on the manufacturing processes and detecting the unusual situations as soon as possible. Spatial defect recognition can discover the problems of manufacturing processes directly. Defect detection and recognition can trace the problems and find out root cause such that engineers can modify it timely to avoid yield loss.
A lot of research works about defects classification have been discussed in the past, but the studied defect patterns are usually single patterns. The researchers ignored the intersecting patterns which are usually much more complicated. Therefore, this research propose to develop an algorithm to deal with the intersecting patterns for helping engineers find out the root cause in the manufacturing rapidly. The objectives of this research are (1) to develop the methodologies to deal with the intersecting patterns including line-shaped cross and curve-shaped cross, (2) to evaluate the performance of different methodologies for intersecting types, and (3) to enhance the performance and save the processing time.
The developed methodology has been verified with real data collected from a famous semiconductor company. The experimental results demonstrate that the proposed methodology can not only has high accuracy but also save much time on dealing with the defect identification comparing to human operations.
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