研究生: |
姜 毅 Chiang, Yi |
---|---|
論文名稱: |
一個增進具有Body-strapped Base 的雙極光電晶體反應速度之方法 A Method of Improving the Response Speed of Bipolar Phototransistors with Body-strapped Base |
指導教授: |
徐永珍
Hsu, Klaus Yung-Jane |
口試委員: |
江雨龍
Jiang, Yeu-Long 賴宇紳 Lai, Yu-Sheng |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering |
論文出版年: | 2018 |
畢業學年度: | 107 |
語文別: | 中文 |
論文頁數: | 70 |
中文關鍵詞: | 光電晶體 、異質接面 、雙極性電晶體 、響應速度 |
外文關鍵詞: | photo transistor, heterjunction, BJT, Response Speed |
相關次數: | 點閱:1 下載:0 |
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由於近年的科技快速進步,光偵測器在生活中的應用日漸增加,使的人們對於它的效能跟速率要求也隨之提升,因此在標準製程條件下設計出響應度高且高速率的光偵測器為本論文所追求的目標。
本文的光偵測器是利用TSMC 0.18um SiGe BiCMOS製程來實現,對異質接面雙載子光電晶體(Heterojunction Phototransistor,HPT)的改進,且使用之前實驗室提出的N-type Body Strapping理論,並藉由外加一些電路或是元件的方式改善性能,特別是針對元件的反應速度上做改善。先利用Silvaco的atlas軟體模擬來設計,並藉由下線實作晶片與量測來得到模擬數據的驗證。
Due to the rapid development of technology, the demand of photodetectors has increased dramatically, and people keep pursuing devices with better performance. The purpose of this thesis is to design high-speed heterojunction phototransistors with outstanding responsivity under standard manufacturing process provided by TSMC.
In this thesis, 0.18um SiGe BiCMOS standard process provided by TSMC is applied.
In the first part of this thesis, we will discuss the properties of heterojunction phototransistors (HPT) with n-type doping body strapping which was proposed in our laboratory, from both TCAD simulation and actual measurement.
The second part of the thesis is the design of some approaches in order to enhance the performance of the HPT device mentioned in part one. This work mainly focuses on improving response speed. And at the end of the thesis, we verified the feasibility of the novel device through the tape-out and actual measurement.
[1] T. Yin, A. M. Pappu, and A. B. Apsel,“Low-cost,high-efficiency,and high-speed SiGe phototransistors in commercial BiCMOS”,IEEE Photonics Technology Letters,vol. 18, no. 1, pp. 55-57, January, 2006.
[2] Zingway Pei, C. S. Liang, L. S. Lai, Y. T. Tseng, Y. M. Hsu, P. S. Chen, S. C. Lu, M.-J. Tsai,and C. W. Liu, “A High-Performance SiGe-Si Multiple-Quantum-Well Heterojunction Phototransistor”, IEEE Electron Device Letters,vol. 24, no. 10,pp. 643-645, October 2003.
[3] Kuang-Sheng Lai,Ji-Chen Huang,and Klaus Y.-J. Hsu,“High-Responsivity Photodetector in Standard SiGe BiCMOS Technology”,IEEE Electron Device Letters,vol. 28, no. 9, pp. 800-802,September 2007.
[4] K. Y. Hsu and B. W. Liao,“High responsivity phototransistor with body-strapped base in standard SiGe BiCMOS technology,” in 2013 IEEE International Conference of Electron Devices and Solid-State Circuits(EDSSC).,
[5] Donald A.Neamen, “Semiconductor Physics and Devices:Basic Principles”,4th ed.,McGraw-Hill, 2012.
[6] S. M. Sze,”Physics of Semicoductor Devices”, 2rd ed. John Wiley & Sons; 1981.
[7] S. M. Sze,“Semiconductor Device Physics and Technology”,John Wily & Sons Inc., 2nd & 3rd
[8] W. Shockley, M. Sparks,and G. K. Teal,“p-n junction transistor”,Physics Review,vol. 83, pp. 151-164, 1951.
[9] Klaus Y. J. Hsu, Ken S. H. Shen,and Ya-Sen Chang, “Enhancing the photoresponsivity of bipolar phototransistors for near-infrared detection”, Applied Physics Letters 108,031112(2016); doi: 10.1063/1.4940395
[10] Jiann S. Yuan,“SiGe,GaAs,and InP Heterojunction Bipolar Transistors.”,John Wiley and Sons,Inc. 1999
[11] 吳昭義, “平臺式矽鍺異質接面雙載子電晶體研製與分析", 國立中央大學, 電機工程研究所, 碩士論文, 中華民國九十四年六月
[12] 林威成, “標準SiGe BiCMOS製程中光偵測結構之研究", 國立清華大學, 電子工程研究所, 碩士論文, 中華民國一百年六月
[13] 沈昇鴻, “標準SiGe BiCMOS製程中實現高響應度及高速光偵測光電晶體", 國立清華大學, 電子工程研究所, 碩士論文, 中華民國一百零四年七月
[14] 廖偉傑, “標準製程下應用於整合型光通訊接收器之光偵測器元件與訊號放大電路設計", 國立清華大學, 電子工程研究所, 碩士論文, 中華民國一百零一年七月
[15] Jin-Woo Han and Yang-Kyu Choi,“Bistable Resistor(Biristor)-Gateless Silicon Nanowire Memory”, VLSI Technology(VLSIT), 2010 Symposium on
[16] J.-W. Han and M. Meyyappan,“Trigger and Self-Latch Mechanisms of npn Bistable Resistor”,Electron Device Letters,IEEE,vol. 35, pp. 387-389, 2014
[17] 張雅森, “具有Body-strapped Base 的雙極光電晶體特性研究", 國立清華大學, 電子工程研究所, 碩士論文, 中華民國一百零六年一月
[18] http://www.osioptoelectronics.com/
[19] US patent Number : US9748330
[20] https://web.stanford.edu/class/ee311/NOTES/Isolation.pdf
[21] 郭正邦, “CMOS 數位 IC” ,1st ed. 1996