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研究生: 羅健維
Luo, Chien-Wei
論文名稱: 三維積體電路之直通矽晶穿孔射頻模型
RF Modeling of Through Silicon Vias (TSVs) in 3D IC
指導教授: 徐碩鴻
Hsu, Shuo-Hung
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 英文
論文頁數: 36
中文關鍵詞: 三維積體電路直通矽晶穿孔模型
外文關鍵詞: 3D IC, Through Silicon Vias, Model, TSV
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  • In this study, a new approach for designing the TSV test structures and extracting the equivalent circuit model parameters is proposed. Compared with the conventional two-port method, the proposed extract structures consumed only a small chip area, and the small serial parasitic elements in the model can be extracted precisely without optimization.
    The proposed equivalent model, composed of R, L, C, and G elements, is based on the physical structure of the TSVs and is verified up to 50 GHz. R and L are extracted by the short test structure; C and G are extracted by the open test structure. The parameters calculated using the derived analytical equations confirmed that the proposed approach leads to a well-defined physical-based model. Based on the proposed RF modeling of TSVs, the magnitude differences of S21 and S11 among the equivalent circuit model, the analytical equations, and the EM simulation are smaller than 0.03 dB and 2 dB, respectively from 1 GHz to 50 GHz. The associated magnitude standard errors and average phase differences of S21 and S11 are 1.25% and 1.81° in average.
    Moreover, scalable models of TSVs are also included in different conditions. By changing some elements from the original model, the model still agrees well with the physical structures. The maximum magnitude standard error and average phase difference do not exceed 6.60% and 7.80°.


    此篇論文提出一種直通矽晶穿孔測試結構的設計,以及等效電路模型參數的萃取。與傳統兩埠方法相比,本篇提到的萃取結構只需佔用較小的面積,且在模型中的寄生效應也較小,因此可被準確地萃取且不需最佳化。
    等效模型根據直通矽晶穿孔的物理結構,共包含電阻、電感、電容、電導,且可應用到50GHz。利用短路測試結構萃取出電阻與電感;電容與電導則使用開路測試結構。使用推導的解析方程式所計算的參數更可證實本篇是具有良好物理根據與定義的模型。根據此篇的直通矽晶穿孔射頻模型,在1GHz到50GHz與解析方程式和電磁模擬之S21與S11的強度差異分別小於0.03dB與2dB。其S21與S11的強度標準誤差以及平均相位差異平均分別為1.25%和1.81°。
    除此之外,更包含不同的情況下時,直通矽晶穿孔模型的可變性。藉由改變原來模型的一些部分,其模型依舊能夠符合物理結構。其強度標準誤差以及平均相位差異的最大值皆不超過6.60%與7.80°。

    Acknowledgement i Abstract ii 摘要 iii Contents iv List of Figures vi List of Tables viii Chapter I Introduction 1 1.1 Motivation 1 1.2 Thesis Organization 2 Chapter II Basic Concept of TSVs and De-embedding Method 3 2.1 Why 3D IC 3 2.2 Through Silicon Vias (TSVs) 5 2.3 General RF De-embedding Method 6 2.4 One-port Extraction 9 Chapter III TSVs Model Extraction and Analysis 11 3.1 Model Extraction 11 3.1.1 Structure of TSVs 11 3.1.2 Design Procedure 12 3.1.3 Open Test Structure 13 3.1.4 Short Test Structure 14 3.1.5 Complete Model 17 3.2 Derivation of Analytical Equations 19 3.3 Summary 22 Chapter IV Scalable Models of TSVs 24 4.1 Different Pitches of TSVs in G-S-G Line Structure 24 4.2 TSVs Including Two Signals 28 4.3 Summary 32 Chapter V Conclusion and Future Work 33 5.1 Conclusion 33 5.2 Future Work 34 References 35

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    [7] R. Torres-Torres, R. Murphy-Arteaga, and J.A. Reynoso-Hernandez, "Analytical Model and Parameter Extraction to Account for the Pad Parasitics in RF-CMOS", IEEE Trans. Electron Devices, Vol. 52, No. 7, pp.1335-1342, July 2005.
    [8] D. Jang, C. Ryu, K. Lee, B. Cho, J. Kim, T. Oh, W. Lee, and J. Yu, "Development and Evaluation of 3-D SiP with Vertically Interconnected Through Silicon Vias (TSV)", Electronic Components and Technology Conference Proceedings, pp. 847, 2007.
    [9] Y. Eo and W. R. Eisenstadt, “High-speed VLSI interconnect modeling based on S-parameter measurements,” IEEE Trans. Comp., Hybrids, Manufact. Technol., vol. 16, pp. 555–562, Aug. 1993.

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