研究生: |
許 靜 Hsu, Ching |
---|---|
論文名稱: |
適用於第五代行動通訊系統之可重組濾波正交多頻分工基頻處理器 Reconfigurable Filtered Orthogonal Frequency Division Multiplexing Baseband Processor for 5G Mobile Communication Systems |
指導教授: |
黃元豪
Huang, Yuan-Hao |
口試委員: |
蔡佩芸
Tsai, Pei-Yun 陳喬恩 Chen, Chiao-En 蔡尚澕 Tsai, Shang-Ho |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
論文出版年: | 2019 |
畢業學年度: | 108 |
語文別: | 英文 |
論文頁數: | 65 |
中文關鍵詞: | 第五代行動通訊系統 、濾波正交分頻多工 、硬體實現 、單輸入單輸出 、毫米波 |
相關次數: | 點閱:4 下載:0 |
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正交分頻多工系統具備子載波正交,擁有高速率資料傳輸以及良好的多天線傳
輸整合的能力,因此獲得許多無線通信系統的採用。循環前綴也常常用於正交分
頻多工的系統中來防止符號間的干擾。但是隨著科技的進步,下一世代的無線通
訊系統有了更高的需求以及目標,同時支援多種不同的系統需求,像是高資料傳
送速率,低延遲,還有增加資料容量等等。為了達到這些新的要求,學術界以及
業界討論了幾個不同的調變波形。本論文提出了濾波正交分頻多工,將一段頻寬
分成不同的次頻帶,利用有限脈波響應數位濾波器來降低不同次頻帶之間的干擾。
與傳統的正交分頻多工比較的模擬結果顯示,提出的濾波正交分頻多工能夠有效
降低帶外輻射以及不同次頻帶間的干擾。本論文所提出的濾波正交分頻多工使用
TSMC 40nm CMOS製程來實作成硬體。所提出的基頻處理器可以重構來支援新
一代通訊系統所需要的彈性架構,可以支援14種不同的框架結構。使用於16x16
多輸入多輸出系統,且支援最多4筆資料流。處理器的最高頻率為200 MHz,總
面積為18.4𝑚𝑚^2。且處理器的最高資料流可以在框架結構10的時候達到1.2Gbps
的吞吐量。
Orthogonal Frequency Division Multiplexing (OFDM) has been widely used in wireless communication systems due to its many advantages such as orthogonality and easy integration with multiple-input and multiple-output (MIMO). Cyclic prefix is also added to
avoid inter-symbol-interference (ISI). However, with the development of the technology, higher expectations of the future wireless system are proposed. Diverse systems need to coexist while having distinct requirements of their own. These requirements may vary. Thus, there are a few 5G waveform candidates discussed in the academia and industry. In this thesis, filtered-OFDM was proposed to meet the demands of the future wireless communication system while having a better performance than the traditional OFDM. Filtered-OFDM is a per subband filtering method as the whole bandwidth is divided into several subband each carrying individual data information. The per subband filtering method is able to reduce the out-of-band emission and then avoid adjacent-channel interference (ACI). Moreover, the baseband processor of the proposed filtered-OFDM algorithm is implemented using TSMC 40 nm CMOS process technology. The proposed
baseband processor can be reconfigured to achieve flexibility. It supports 14 different frame structures in terms of bandwidth, FFT size, cyclic prefix duration and subcarrier spacing. The operating frequency is 200 MHz and the cell area is 18.4 mm^2. The
maximum throughput achieves 1.2Gb/s in FFT configuration 10.
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