多頻帶正交多工超寬頻無線通訊系統基頻同步演算法與晶片設計

簡易檢索 / 詳目顯示

回結果列表

研究生：	黃彥欽 Yen-Chin Huang
論文名稱：	多頻帶正交多工超寬頻無線通訊系統基頻同步演算法與晶片設計 Baseband Synchronization Algorithm and Chip Design for MB-OFDM UWB System
指導教授：	吳仁銘 Jen-Ming Wu
口試委員:
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 通訊工程研究所 Communications Engineering
論文出版年：	2007
畢業學年度：	95
語文別：	中文
論文頁數：	92
中文關鍵詞：	多頻帶正交多工、超寬頻無線通訊系統、同步、基頻
外文關鍵詞：	OFDM, UWB, Synchronization, Baseband
相關次數：	點閱：4 下載：0
分享至:	分享至facebook 分享至twitter

查詢本校圖書館目錄查詢臺灣博碩士論文知識加值系統勘誤回報

超寬頻(UWB)無線通訊系統是一種在頻譜上佔有很寬的頻段，並利用極低的功率傳輸數位資料的通訊技術。它非常適合用於無線通訊傳輸上，特別是應用在短距離及高速率的局部區域網路中做資料傳輸。其使用多頻帶正交分頻多工調變(MB-OFDM)的方案來實現。
然而多頻帶正交分頻多工調變的系統性能，將會受到時間和頻率飄移錯誤的嚴重影響。換句話說，多頻帶正交分頻多工調變系統的優點，必須奠定於好的同步演算法與技術。因此，我將針對同步演算法的設計與同步電路晶片實作做一個完整的研究。
在本論文中，首先我們將對正交分頻多工調變的技術、基本訊號傳輸架構以及超寬頻(UWB)無線通訊系統的實體層規格和各項協定做一個簡單的介紹。之後，我們將討論關於接收端的同步演算法，包括非同步所造成的問題：載波頻率飄移(CFO)、符元邊界時間飄移(STO)和取樣頻率飄移(SFO)，以及如何解決同步問題的方案：封包檢測、符元邊界估測、載波頻率飄移和取樣頻率飄移的估測與補償。接下來，我們會探討硬體架構設計，在此也會詳細描述如何降低硬體複雜度。之後，並利用硬體描述語言(RTL)來實現我們的基頻接收機同步晶片。再來使用各項電腦輔助自動化設計的軟體來做晶片設計。最後，我們會顯示模擬和設計的結果，包含晶片的報告與佈局圖，並做一些比較，然後做一個總結。

Ultra Wideband (UWB) communication system is a technology for transmitting digital data at very high rates over a wide spectrum in several frequency bands by using very low power. It is ideally suited for wireless communications, particularly short-range and high-speed data transmissions for local area network applications. Moreover, it is realized by using Multiband Orthogonal Frequency Division Modulation (MB-OFDM) scheme.
In this thesis, first we will introduce some basic of OFDM technologies and the physical layer specification of UWB system. After that, we will talk about the synchronization algorithm in receiver-end, including the asynchronous problems and how to solve them. Then, we will discuss the hardware architecture and the chip implementation. Here, we will also describe how to reduce the hardware complexity in detail. Finally, we will show the results of simulation and design, do some comparisons and make a conclusion of this thesis.

Contents …………………………………………………………i
List of Figures ………………………………………………iv
List of Tables …………………………………………… viii
Abstract ……………………………………………………… ix

Chapter 1
Introduction ……………………………………………………1

Chapter 2
OFDM Basics and UWB System …………………………………3
1 Overview of OFDM Basics…………………………………3
1.1 OFDM Introduction …………………………………… 3
1.2 OFDM Signal Characteristics ……………………… 6
1.3 Transmitter and Modulation …………………………9
1.4 Receiver and Demodulation …………………………10
1.5 Guard Period & Cyclic Prefix …………………… 11
1.6 OFDM Windowing ……………………………………… 13
2 PHY Specification of UWB System ……………………14
2.1 UWB Introduction …………………………………… 14
2.2 Mathematical Framework …………………………… 15
2.3 System Parameters ……………………………………18
2.4 Implementation Considerations ……………………24

Chapter 3
Synchronization Algorithms of Receiver ……………… 30
1 Effects of Asynchronous Errors …………………… 30
1.1 Carrier Frequency Offset (CFO) ………………… 30
1.2 Symbol Timing Offset (STO) ……………………… 34
1.3 Sampling Frequency Offset (SFO) …………………38
2 Proposed Synchronization Algorithms ………………45
2.1 Packet Detection …………………………………… 45
2.2 CFO Estimation and Compensation …………………49
2.3 Symbol Timing Estimation ………………………… 52
2.4 SFO Estimation and Compensation …………………53

Chapter 4
Implementation Architecture of Synchronization Circuit…58
1 Hardware System Block Diagram ………………………58
2 Architecture of Packet Detection ………………… 60
2.1 Packet Detection Block Diagram ………………… 60
2.2 Complex Multiply Mapper ……………………………61
2.3 Sliding Window and Sliding Mapper ………………62
2.4 Detector Unit …………………………………………63
3 Architecture of Symbol Timing Estimator …………65
3.1 Match Filter and Cross-correlation …………… 65
3.2 Frequency Hopping Signal ………………………… 67
4 Architecture of CFO Estimator ………………………68
4.1 Algorithm of CORDIC …………………………………68
4.2 Hardware Architecture of CORDIC …………………71
4.3 Compensation Update and Output Computation … 72

Chapter 5
Simulation Results and Chip Design………………………74
1 Simulation Results …………………………………… 74
1.1 Quantization Simulation ……………………………74
1.2 Packet Detection Simulation ………………………75
1.3 Symbol Timing Simulation ………………………… 76
1.4 CFO Simulation ……………………………………… 77
1.5 SFO Simulation ……………………………………… 79
1.6 RTL Simulation ……………………………………… 81
2 Chip Design ………………………………………………83
2.1 Chip Overall Architecture …………………………83
2.2 Design Flow and Interface Signals ………………84
2.3 Gate-Level Simulation and Reports ………………85
2.4 Chip Specification List and Reports ……………88
2.5 Chip Layout Views ……………………………………89

Chapter 6
Conclusion and Future Work…………………………………91

Bibliography ………………………………………………… 92

                                

[1] J. Terry, and J. Heiskala, “OFDM Wireless LANs: A Theoretical and Practical Guide”, Indiana: SAMS Publishing, 2001.

[2] R.van Nee and R. Prasad, “OFDM for wireless multimedia communications”, Boston/London: Artech House, 1999.

[3] Gordon L. Stuber, “Principles of Mobile Communication”, 2nd edition, Kluwer Academic Publishers, 2002.

[4] Ta-Sung Lee,” Signal Processing for Wireless Communications”, course handout, spring, 2006.

[5] S. Haykin, “Communication Systems”, 4th Ed., John Wiley, 2000.

[6] A. Batra et al., "MultiBand OFDM Physical Layer Specification Release 1.0", April 27, 2005.

[7] Chi-chie Chung, Jen-ming Wu,” IEEE 802.16-2004 Fixed WiMAX Rx Baseband Chip Design and Integration”, TsingHua National University, 2006

[8] Chi-hong Su, Jen-ming Wu, “Implementation of OFDM Processing and Synchronization for WiMax Receiver”, TsingHua National University, 2005.

[9] Chun-hung Chou, Jen-ming Wu, "Baseband Timing Synchronization Circuit Design for WiMAX Systems,” TsingHua National University, 28, July, 2005.

[10] Maja Sliskovic, “Carrier and Sampling Frequency Offset Estimation and Correction in Multicarrier Systems”

[11] Steven M. Kay, “Fundamentals of Statistical Signal Processing: Estimation Theory”, Prentice Hall.

[12] R. Andraka, “A survey of CORDIC algorithms for FPGA based computers”, ACM/SIGDA, ACM, 1998.

全文公開日期本全文未授權公開 (校內網路)
全文公開日期本全文未授權公開 (校外網路)

簡易檢索 / 詳目顯示

相關論文