近年來，在系統晶片(System-on-Chip)中，嵌入式記憶體核心已經成為被最廣泛使用的元件。它們通常佔據整個系統晶片的絕大部分面積，並且對整體晶片良率有決定性的影響力。為了提昇系統晶片在大量生產時的良率，記憶體內建自我修復(Built-In Self-Repair)電路已經成為必備的元件。然而對記憶體而言，使用備用記憶體修復是個有效增加良率的方法，其中已有許多的備用記憶體修復的方法被提出。例如應用常見的記憶體位址重新對應(address remapping)機制，即利用位址比對及位址重新組態設定達到修復之目的。然而，使用典型的記憶體位址重新對應時，通常會伴隨著明顯的時序損失。因此，我們提出一個新的記憶體位址重新對應機制，藉由增加寫入緩衝器(write buffer)來減少記憶體在正常模式下操作的時序損失。在正常模式下存取記憶體時，對於讀取指令來說，我們同時讀取主記憶體及備用記憶體；對於寫入指令則分成兩個步驟，首先將資料存到寫入緩衝器內，並在下一個寫入指令時，立即將寫入緩衝器內有效資料寫入備用記憶體。主記憶體的寫入動作則不必分成兩個步驟寫入。所以會多出一個單位時脈時間做位址對比，決定所要存取的資料是否儲存在備用記憶體內。藉由這個新的記憶體位址重新對應方法及其對應之備用記憶體架構，所提出的記憶體自我修復電路在正常模式下操作，時序損失可以與只配備記憶體內建自我測試(Built-In Self-Test)電路相同－－－分別在輸入端及輸出端各僅有一個多工器的延遲時間。

Recently embedded memories are the most widely used cores in system-on-chip (SOC). They often occupy most of the chip area and dominate the overall yield of the chip. For the sake of improving the manufacturing yield of the chip, memory Built-In Self-Repair (BISR) has become essential. Redundancy repair is an effective yield-enhancement technique for memories. There are many previously proposed repair methodologies, such as the popular repair methodology based on the concept of an address remapping mechanism achieved by address comparison and address reconfiguration. However, a BISR design with a typical address remapping mechanism usually involves a significant timing penalty. Therefore, we propose a new address remapping scheme with a write buffer to reduce the timing penalty. During memory access, read operations to the main memory and spare memory are executed in parallel. However, the write operation to spare memory is divided into two steps. Data is first written into the write buffer, then into the spare memory when the next write operation arrives. Therefore, there is one clock cycle to compare the access address with the address stored in the repair registers. With the proposed address remapping scheme and the redundancy architecture, the timing penalty of our BISR scheme is the same with that of Built-In Self-Test (BIST) circuit — only one multiplexer delay for both the inputs and outputs.

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