在此論文中，我們提出了多層閘極介電質結合奈米線多通道與Π型閘極結構的薄膜電晶體之結構，此結構具有高性能薄膜電晶體的特性，另一方面，也同時具有非揮發性記憶體的特性。
在薄膜電晶體方面，我們利用奈米線多通道結合Π型閘極結構的薄膜電晶體之結構，在施加相同閘極電壓的情況下，提高閘極的控制能力；在奈米線多通道方面，因為奈米線在邊緣處的曲率半徑較小，在相同電壓下，有較大的電場之特性；在Π型閘極結構方面，因為Π型閘極結構可以控制的有效通道寬度與通道邊緣處的數目較多，在相同電壓下，在通道裡有較多的載子數與較多的高電場奈米線邊緣處之特性。製作出多通道奈米線結合Π型閘極結構的薄膜電晶體，可以有效的降低導通電壓(threshold voltage)，增加開關電流比(On/Off ratio)，較陡峭的次臨界導通斜率(subthreshold slope)，和更優良的元件驅動能力，其電性較一般標準結構的薄膜電晶體為好。
在非揮發性記憶體方面，由於Π型閘極結構具有較大的有效通道寬度與較多的高電場奈米線邊緣處，可以使元件在進行寫入/抹除(Program/Erase)的操作時，具有較高的效率，另一方面，奈米線結合Π型閘極結構的非揮發性記憶體，無論是在資料的保存性(Reliability)方面，或是多次讀寫(Endurance)方面，具有良好元件可靠度。
多重閘極奈米線薄膜電晶體有極大的潛力應用在面版上的系統整合，利用多重閘極奈米線薄膜電晶體同時具有高效能驅動元件及非揮發性記憶體元件的特性，可以大幅的簡化製程步驟。

In this thesis, we proposed the thin film transistor with multi-layered gate dielectric and multiple nanowire channel combined with Pi gate structure, this structure has the high performance in thin film transistor characteristic. On the other hand, also simultaneously has the non-volatile memory characteristic.
In the thin film transistor aspect, we employ the thin film transistor with multiple nanowire channel combined with Pi gate structure, in the same gate pole bias situation, it enhanced the gate extremely control ability; In multiple nanowire channel aspect, because the radius of curvature in the edge is smaller. Under the same gate voltage, it has characteristic of the larger electric field; In Pi gate structure aspect, because the Pi gate structure may control extremely the effective channel width and the channel edge number are more. Under the same gate voltage, it has more carries in the channel and the more high electric field edge characteristic. The thin film transistor with multiple nanowire channel combined with Pi gate structure was manufactured, it may effective reduce the threshold voltage, increases the switch current ratio (On/Off ratio), the steeper subthreshold slope, and the superior driving ability. Its electric properties is ordinary the standard structure the thin film transistor for good.
In non-volatile memory aspect, because the Pi gate structure has the larger extremely effective channel width with the more high electric field edge in nanowire channel, it may have the high efficiency when carries on Program/Erase operation. On the other hand, the non-volatile memory characteristics with multiple nanowire channel combined with Pi gate structure, however in the material durable (Reliability) aspect, perhaps the read-write (Endurance) aspect, has the good device reliability.
The thin film transistor with multi-layered gate dielectric and multiple nanowire channel combined with Pi gate structure has the enormous potential application extremely on the system on plane conformity. The use of the thin film transistor multi-layered gate dielectric and multiple nanowire channel combined with Pi gate structure simultaneously has the extremely high the driving efficiency and the non-volatile memory characteristic, it may the large simplification system manufacture step.

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Chapter 4
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