研究生: |
楊長泓 Chang-Hung Yang |
---|---|
論文名稱: |
在特定應用導向下精簡指令集處理器改進後之效能評估 Performance Evaluation of Application-Specific RISC Processor Improvements |
指導教授: |
黃慶育
Chin-Yu Huang |
口試委員: | |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 資訊工程學系 Computer Science |
論文出版年: | 2005 |
畢業學年度: | 93 |
語文別: | 英文 |
論文頁數: | 47 |
中文關鍵詞: | 特定應用 、精簡指令集架構 、數位訊號處理器 、MP3 解碼器 、ARM 處理器 |
外文關鍵詞: | application specific, RISC architecture, digital signal processor, MP3 decoder, ARM processor |
相關次數: | 點閱:4 下載:0 |
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精簡指令集處理器是一種 load-store 的架構,所有的運算都是在暫存器中完成的,當我們需要做資料的運算時,我們必須先從記憶體中將資料搬到暫存器裡,然後才可以做資料的運算處理,當我們完成資料的運算後,我們也需要將運算結果存回記憶體中。事實上,訊號處理的應用程式需要大量的資料計算,所以它會花費很多系統資源來做資料的搬移以及資料的運算。因此在精簡指令集處理器的架構下,訊號處理的應用程式很難有好的執行效能。所以針對這一類的應用程式,就必須提供一個有效率的處理平台,來達到應用程式本身所需的要求。因為有很多的微處理器都是精簡指令集處理器架構,例如: SPARC, MIPS, PowerPC和ARM ,所以我們將只專注在某一種微處理器。除此之外,很多的訊號處理應用程式都對大量的資料運算有很高的要求,例如 : G.729 編/解碼器 和 MP3 編/解碼器,所以我們也將只專注在某一種訊號處理應用程式。在這篇論文中,我們將採用ARM這個微處理器以及使用 MP3這個解碼器程式。此外,訊號處理的應用程式很難在傳統的精簡指令集處理器架構上有好的執行效能。為了克服這個困難,我們將利用軟體的最佳化和硬體的改進來提升整體系統的效能。透過軟硬體的改進,能降低開發產品所需的費用,同時也能達到最低的系統效能要求。從實驗的數據中,我們可以觀察到整體的效能有很大的改善。
The RISC architecture is a load-store architecture that its data processing operations execute only on registers. When the programmer executes the computational operations, the processed data must be loaded from memory to registers and calculated. After completing the operations, it also needs to write the results back to memory. In fact, the signal processing application requires many data computations. It takes many resources to execute data movements and operations. Therefore, the performance of the signal processing application is limited on traditional RISC architecture. The proposed thesis will only focus on one RISC microprocessor because many microprocessors are RISC architecture, such as SPARC, MIPS, PowerPC and ARM. Furthermore, many signal processing applications are computation intensive, such as G.729 and MP3 codec. The proposed thesis also focuses on one signal processing application. In this thesis, ARM processor and MP3 decoder are selected as the RISC architecture platform and signal processing application, respectively. Moreover, because the signal processing application can not execute efficiently on traditional RISC architecture, both software optimization and architecture enhancement will be used to improve the performance of the system. The experimental results have shown great performance improvements in the system.
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