應用於多核心雛型平台之內嵌式追蹤器設計｜國立清華大學博碩士論文庫

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研究生：	簡孝偉 Chien, Hsiao Wei
論文名稱：	應用於多核心雛型平台之內嵌式追蹤器設計 Design of Embedded Tracer for Many-Core Prototyping Platform
指導教授：	黃稚存 Huang, Chih Tsun
口試委員:	黃俊達 Huang, Juinn Dar 劉靖家 Liou, Jing Jia
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 資訊工程學系 Computer Science
論文出版年：	2016
畢業學年度：	104
語文別：	英文
論文頁數：	91
中文關鍵詞：	多核心、追蹤器
外文關鍵詞：	many-core, tracer
相關次數：	點閱：2 下載：0
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　　隨著矽製程不斷進步，系統晶片設計可以整合處理器個數隨之增加，使得設計的複雜度也上升，而晶片網路多核心系統晶片設計大幅降低設計複雜度，也是現今常見的架構。傳統追蹤和除錯的方法注重在處理器和通訊網路上面，但是運行在多核心上的平行程式也是一個重要的部分。然而在多核心系統，對軟硬體做交互追蹤和除錯是非常有挑戰性的工作。

　　在這篇論文中，我們基於多核心雛形平台上提出一個追蹤通訊網路傳輸狀況和核心之間溝通行為的嵌入式追蹤器。另外也改進前一代追蹤器的一些缺陷，例如：增進追蹤資料的資訊含量、簡化追蹤器設計。我們提出的追蹤器架構包含追蹤設定元件、通訊追蹤元件、通訊網路節點追蹤元件和追蹤匯流排系統。追蹤設定元件提供使用者能在系統運行中設定追蹤器元件；通訊追蹤元件監視處理單元的通訊元件的通訊事件；通訊網路節點追蹤元件則是用來監視在通訊網路傳輸上，使用者感興趣的事件；追蹤匯流排系統則會將通訊追蹤元件和通訊網路節點追蹤元件產生的追蹤資料加以包成封包，並將其儲存到嵌入式追蹤緩衝。

　　在我們的個案研究中，顯示可以快速從我們提出的追蹤器產生的追蹤資料中做效能分系和除錯。在實驗分析部分，顯示我們提出的追蹤器減少87.96%到99.98%的通訊網路追蹤資料量。以及使用我們提出的時間高分支方法，可以減少85.72%到95.19%的時間資訊封包。此外，我們提出的追蹤器面積只佔多核心系統平台的1%，而且不會導致效能下降。

Due to ever increasing the advance of silicon technology, the complexity of System-on-a-Chip (SOC) design keeps growing rapidly as the number of cores increases. Many-core SoC with Network-on-Chip (NoC) is popular used in today. However, traditional verification and debugging approaches aim at individual cores or on-chip communication network, but the parallel application is also important on many-core systems. The verification of design and the debugging cooperating with parallel application and hardware with a lot of processor cores is the most of challenging tasks and has become extremely important for many-core systems.

In the thesis, we present the architecture of the proposed embedded tracer on the proposed many core platform and methodology for application-level communication that focus on NoC's traffic situation and inter-core communication. We also improved several lacks on the previous tracer. For example, finding out the cause of packet congestion needs huge trace data, and previous communication event trace loses some information useful. The proposed communication tracer consist of trace configuration unit, communication trace unit, NoC switch trace unit and trace bus system. Trace configuration Unit provides to configure tracer at run-time. Communication trace unit monitors the communication event on each PEs' communication unit. NoC switch trace unit is used to monitor transaction on the NoC which users may be interested in. Trace bus system is used to packet trace data from communication trace unit and NoC switch trace unit, and store them to embedded trace buffer.

The case study shows that the proposed communication tracer can effectively collect information form the communication unit and the NoC to inter-PE communication performance analysis and debug. Experiment result shows that the reduction ratio of NoC trace data in our proposed communication tracer can achieve between 87.96% to 99.98% depended on various cases. By using our proposed time high offset method can reduce time beacon from 85.72% to 95.19%. In addition, the area of the proposed communication tracer cost is only 1% compared to the many-core platform without speed penalty.

Introduction 1
1 Introduction of SoC Tracing and Debugging  . . . . . . . . . . . . . . .  1
2 The Challenge of Tracing and Debugging on Many-Core SoC  . . . . . . . .  3
3 The Lack of Previous Work  . . . . . . . . . . . . . . . . . . . . . . .  5
4 Motivation and Contribution  . . . . . . . . . . . . . . . . . . . . . .  6
5 Organization of the Thesis . . . . . . . . . . . . . . . . . . . . . . .  7
Previous Work                                                                 8
1 Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
1.1 OpenRISC . . . . . . . . . . . . . . . . . . . . . . . . . . . . .  8
1.2 Bus Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
            2.1.2.1 Wishbone . . . . . . . . . . . . . . . . . . . . . . . . . 10
            2.1.2.2 Open Core Protocol . . . . . . . . . . . . . . . . . . . . 12
            2.1.2.3 Advanced Trace Bus Protocol  . . . . . . . . . . . . . . . 15
2 Overview of Existent Many-Core Platform  . . . . . . . . . . . . . . . . 17
2.1 Processing Element . . . . . . . . . . . . . . . . . . . . . . . . 19
2.2 Communication Unit . . . . . . . . . . . . . . . . . . . . . . . . 19
2.3 Network on Chip  . . . . . . . . . . . . . . . . . . . . . . . . . 20
3 On-chip Communication Library  . . . . . . . . . . . . . . . . . . . . . 22
4 Overview of Previous Many-Core Tracer  . . . . . . . . . . . . . . . . . 24
4.1 Communication Event Generator  . . . . . . . . . . . . . . . . . . 24
4.2 NoC Event Generator  . . . . . . . . . . . . . . . . . . . . . . . 28
Component of Proposed Communication Tracer and Implementation                29
1 Overview of Communication Tracer . . . . . . . . . . . . . . . . . . . . 29
2 Trace Configuration Engine . . . . . . . . . . . . . . . . . . . . . . . 31
3 Communication Trace Unit . . . . . . . . . . . . . . . . . . . . . . . . 34
3.1 Communication Event monitor  . . . . . . . . . . . . . . . . . . . 36
3.2 FIFO Checking and Utilization Unit . . . . . . . . . . . . . . . . 37
4 NoC Switch Tracer  . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4.1 The Top View of NoC Switch Tracer  . . . . . . . . . . . . . . . . 38
4.2 NoC Switch Trace Unit  . . . . . . . . . . . . . . . . . . . . . . 40
4.3 Hop Count Generator & Turn Direction Generator . . . . . . . . . . 42
4.4 NoC Switch Tracer implement in NoC with FIFO Channel . . . . . . . 43
5 Pending Switch, Hierarchical Trace Bus, Funnel and Embedded Trace Buffer 43
6 The Multiple Clock Domain Issue  . . . . . . . . . . . . . . . . . . . . 46
Proposed Tracing and Debugging Methodology and Demonstrations                49
1 The Debugging and Tracing Flow on Many-Core Platform . . . . . . . . . . 49
2 off-line Analyzing . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
3 Demonstration Environment and Setup for Debugging and Tracing  . . . . . 53
4 Case Study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
4.1 FIFO Control Bug . . . . . . . . . . . . . . . . . . . . . . . . . 55
4.2 Odd-Even Sort  . . . . . . . . . . . . . . . . . . . . . . . . . . 60
            4.4.2.1 Introduction of Odd-Even Sort  . . . . . . . . . . . . . . 60
            4.4.2.2 Trace Data Analysis and Improvement  . . . . . . . . . . . 60
            4.4.2.3 Result of Improvement  . . . . . . . . . . . . . . . . . . 63
4.3 3D Parallel Graphics Pipeline Program  . . . . . . . . . . . . . . 65
            4.4.3.1 Introduction of 3D Parallel Graphics Pipeline Program  . . 65
            4.4.3.2 Loading Balancing and Performance Issue  . . . . . . . . . 67
            4.4.3.3 Trace Data Analysis and Improvement  . . . . . . . . . . . 69
            4.4.3.4 Result of Improvement  . . . . . . . . . . . . . . . . . . 73
Experiment Result and Analysis                                               77
1 The Reduction Rate of Trace Data . . . . . . . . . . . . . . . . . . . . 77
1.1 The Reduction Rate of NoC Trace Data . . . . . . . . . . . . . . . 77
1.2 The Reduction Rate of Time Beacon Packet . . . . . . . . . . . . . 79
2 The Rate of Generating Trace Data  . . . . . . . . . . . . . . . . . . . 80
3 Synthesis Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Conclusion and Future Work                                                   83
1 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
2 Future Work  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Appendices 85
Appendix .A Global Addressing Space on Many-Core Platform  . . . . . . . . . . 86
Appendix .B Communication Unit Addressing Space Used in A Processing Element . 87
                                

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