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研究生: 盧承宏
Cheng Hong Lu
論文名稱: 300V溝渠式與P型場環體橫向雙擴散金氧半場效電晶體之設計
The Design of 300V Trench and P-ring LDMOSFET
指導教授: 龔正
Jeng Gong
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 產業研發碩士積體電路設計專班
Industrial Technology R&D Master Program on IC Design
論文出版年: 2007
畢業學年度: 95
語文別: 中文
論文頁數: 80
中文關鍵詞: 溝渠P型場環體橫向雙擴散金氧半場效電晶體
外文關鍵詞: trench, P-ring, LDMOS
相關次數: 點閱:2下載:0
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  • 功率元件為了與平面製程整合,必須將傳統垂直式的元件結構改成橫向式的設計,因而可與低壓電路整合於同一晶片上。本論文探討的主軸結構為Trench LDMOSFET,其特性為在結構中閘極下方的漂移區內填入二氧化矽,使得導通電阻與元件面積獲得到比傳統LDMOSFET更佳的元件性能。
    本篇論文將Trench SiO2與P-ring結合於傳統LDMOSFET中作整合分析。改良傳統Trench LDMOSFET過長的溝渠使用,加入的P型場環體(P-internal field ring)讓元件整體的RESURF效果發揮更卓越;在固定元件尺寸之下的改良式結構比起傳統式結構可以擁有更優越的效能,而我們定義這種改良式結構為複合式LDMOSFET。
    最後將透過電腦模擬的方式,可以清楚知道在不同條件設定下的崩潰電壓與導通電阻,有效的掌握其結構於最佳化的過程中,經過不斷地相互制衡後最終達到此次設計的目標300V,使得在同一尺寸下的元件能充分發揮空間利用率,並提出此複合式結構於未來開發的可能性。


    In order to integrate power devices with planar IC process, the devices structure must be changed from the traditional vertical structure to lateral design, such that they can be integrated in the same chip. The main object of this thesis is Trench LDMOSFET. The characteristic of the structure is to fill a SiO2 trench in the drift region under the gate, to decrease on-resistance and to produced better effect than traditional LDMOSFET.
    In this thesis, we integrate the oxide trench and P-ring into traditional LDMOSFET to further improve the performance of RESURF LDMOSFET. Devices’ performance is compared in the base of the same size.
    Finally, we use computer simulation to obtain the detail of breakdown voltage and on-resistance under different situations. Careful tuning is made to obtain the optimum process conditions. The goal reached is that the device can resist 300V breakdown voltage. The efficiency of the traditional device is indeed reinforced, and the results of the simulation also create the possibility of developing the complex structure in future.

    摘要.........................................................................................................I 目錄..................................................................................................... ...III 第一章 前言………………………………………………………..... 1 第二章 LDMOSFET操作原理與發展……………………………...3 2.1 LDMOSFET的基本結構與工作原理…………...…...............3 2.2 功率元件的崩潰機制………………………………………...4 2.2.1 基納崩潰(Zener breakdown)………………………......4 2.2.2 累增崩潰(avalanche breakdown)………………..…….5 2.3 LDMOSFET的導通電阻(on-resistance)…………………...5 2.3.1 通道電阻(channel resistance)……………..………..….6 2.3.2 聚積電阻(accumulation layer resistance)......................7 2.3.3 漂移區電阻(drift resistance)……………………….….7 2.4 RESURF (REduced SURface Field )降低表面電場原理……..8 2.4.1 RESURF的發明………………………………………....8 2.4.2 RESURF LDMOSFET的操作原理……………………..9 2.5 場板(field plate)之引用………………………………........10 第三章 Trench與P-ring應用於LDMOSFET的優點……………...18 3.1 RESURF LDMOSFET的限制與缺點……………………….18 3.2 二氧化矽溝渠(oxide-trench)於LDMOSFET性能上的改善……………………………………………...……………...20 3.3 P型環(P-ring)於LDMOSFET性能上的改善……………..22 3.4 Oxide-trench與P-ring之複合LDMOSFET結構的性能優勢……………………………………………………………..23 第四章 Oxide-trench與P-ring LDMOSFET複合式結構之最佳化設計……………………………………………....……………..31 4.1 參數定義…………………………………………….............32 4.1.1 崩潰電壓(breakdown voltage)……………....….........32 4.1.2 導通電阻(on-resistance)……………….......……….32 4.1.3 臨界電壓(threshold voltage)……………………….33 4.1.4 效能指標(efficiency index)…………………………34 4.2 Oxide-trench與P-ring複合式LDMOSFET的製程步驟......34 4.3 Oxide-trench與P-ring複合式LDMOSFET之結構模擬…….......................................................................................35 4.3.1 傳統Oxide-trench LDMOSFET置入P型場環體.........36 4.3.2 複合式LDMOSFET參數最佳化模擬分析…………..42 4.3.3 複合式LDMOSFET的基本參數……………………..51 4.3.4 具有P型埋藏層(P-buried layer)之複合式LDMOSFET 結構....................................... 52 4.4複合式LDMOSFET與傳統Trench LDMOSFET比較…......53 第五章 結論............................................................................................76 參考資料..................................................................................................78

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