本篇論文主旨在研究各種鋯基高介電常數氧化物應用於非揮發性記憶體(NVM)、金屬氧化物半導體(MOS)和金氧金電容(MIM)等元件及其相關特性之研究。
本文可分為兩大部分，第一部份的研究主要集中在利用不同的製程方式製作結晶態的二氧化鋯 (ZrO2)，整合應用於金屬氧化物半導體的閘極介電層與非揮發性記憶體的電荷補捉層中。首先，在非揮發性記憶體方面的研究，我們利用原子層沉積(ALD)方式成長介電系數高達37.8的結晶態tetragonal ZrO2 (t-ZrO2)作為電荷捕捉層,並加入氨電漿氮化處理改善結晶態介質之漏電流，進而達成較大的記憶視窗、快速的寫入/抹除操作速度和良好的資料儲存特性;另一方面，我們也研究了結晶態ZrO2與非晶態ZrO2在作為電荷捕捉層間的差異，在不使用ALD的機台狀況下，我們研究發現在濺鍍ZrO2時摻入一定比例的氮原子，再加上後續600 oC的回火處理即可形成cubic ZrO2，並具有達32.8的介電常數。 這與非晶態的ZrO2元件相比，操作速度大幅的提升，原因在於結晶態ZrO2能提供較大的介電係數與較多的缺陷位置。
在金屬氧化物半導體方面的研究，首先我們嘗試將ALD沉積之tetragonal ZrO2應用於CMOS元件之閘極介電層，研究tetragonal ZrO2與Al2O3堆疊順序對於元件效能之影響。在此研究中，我們發現相較於Al2O3/t-ZrO2/Si的堆疊順序，熱穩定性較好的t-ZrO2/Al2O3/Si堆疊可以獲得較大的電容值、較好的散頻現象、較低的漏電流以及良好的可靠度。同時，為了使元件能有更優異的漏電流表現，我們採用先前提出的電漿氮化對tetragonal ZrO2進行處理，結果顯示漏電流確實能有大幅度的改善。此外，另一方面的研究則是在探討結晶態tetragonal ZrO2的形成方式，除了ALD的沉積方式之外，我們嘗試使用熱蒸鍍系統來成長結晶態tetragonal ZrO2，在此研究中，藉由沉積ZrO2/Ge/ZrO2夾層結構以及後續600 oC的回火處理，即可形成以鍺摻入之穩定結晶態tetragonal ZrO2。相較於其他文獻，這種製程方式能夠提供一種更為可靠的方式來控制鍺摻入的比例，進而在較低的熱處理溫度下形成結晶態tetragonal ZrO2。另外，在研究中我們也針對結晶態tetragonal ZrO2進行後續氨電漿處理和氫氣熱處理，藉此比較其在元件漏電流和可靠度上的影響。
第二部分的研究主要在於非晶態鋯基高介電常數氧化物方面，包含(ZrO2)x(La2O3)1−x合金應用於金屬氧化物半導體的閘極介電層與ZrTiOx應用於金氧金電容的絕緣層中。首先，我們利用熱蒸鍍系統的方式沉積ZrO2/La2O3/ZrO2夾層結構並進行後續700 oC的回火處理，以形成介電常數達26.2的(ZrO2)x(La2O3)1−x合金作為閘極氧化層。與以往的結晶態ZrO2不同的是，非晶態的(ZrO2)x(La2O3)1−x合金並不會有晶界存在而導致漏電流惡化的困擾。同時，我們也藉著整合高品質的氮氧化矽作為介面層 ，除了使元件的EOT微縮至1.1nm，並且達到較好的散頻現象、較低的介面缺陷密度、漏電流以及良好的可靠度等電特性。最後，在金氧金電容的研究方面，我們發現以單層的ZrTiOx介電層的MIM電容具有負的非線性電壓電容係數，其介電常數達22.5。而單層的ZrTiOx介電層MIM電容具有正的非線性電壓電容係數和高介電常數25.8。藉由整合ZrLaOx與ZrTiOx兩種金屬氧化物作為MIM電容的介電層，我們得以實現非線性電壓電容係數的"抵消效應"並且得到高電容密度的成果。以ZrLaOx/ZrTiOx/ZrLaOx堆疊結構的MIM電容可以得到高電容密度14.6 fF/μm2和很小的非線性電壓電容係數33 ppm/V2，並且在頻散現象、溫度穩定性、可靠度和漏電流密度等特性上有著不錯的表現。
傳統矽電子元件在尺寸微縮上遇到極大的挑戰，本論文成功地開發出各種包含結晶態與非晶態的鋯基氧化物，藉著其較高的介電常數，結合高品質的介面層或後續的電漿處理，成功的應用於非揮發性記憶體(NVM)、金屬氧化物半導體(MOS)和金氧金電容(MIM)等元件中，不僅具有極佳的潛力，相信未來也能整合於現行的先進互補式半導體技術當中。

In this thesis, various Zr-based high-κ dielectrics are widely discussed for the application of nonvolatile memory, MOS device, and MIM capacitors. This study can be roughly divided into two parts. At first part, the tetragonal ZrO2 (t-ZrO2) or cubic ZrO2 (c-ZrO2) is formed by different fabrication process and used as charge-trapping layer for flash memory and gate dielectric for MOS device, respectively. For Nonvolatile memopry, a tetragonal ZrO2 film was introduced as the charge-trapping layer for nonvolatile memory and the impact of NH3 nitridation of the tetragonal ZrO2 film on memory performance was also explored. This is the pioneering research on the use of crystalline high-κ material as the charge-trapping layer and the drawbacks of the crystalline high-κ material have been avoided by the appropriate nitridation, which results in a high operation speed in terms of 2.6-V flatband voltage shift by programming at +10 V for 10 ms and a good retention characteristic. On the other hand, an amorphous ZrON film and ZrON crystallized to a cubic ZrO2 film by thermal annealing were used as the charge-trapping layer to explore the impact of crystallinity of high-κ dielectric on memory performance. The memory with a nitrogen-stabilized cubic ZrO2 film shows promising performance in terms of 3.81-V hysteresis memory window by ±7-V program/erase voltage. As compared to that with an amorphous ZrON film, the improved performance is due to the greatly enhanced κ-value of 32.8 and the increased trapping sites provided by grain boundaries.
For the MOS device application, the tetragonal ZrO2 was deposited by the atomic layer deposition (ALD) as the gate dielectrics. In this work, the electrical characteristics of the t-ZrO2/Al2O3 or Al2O3/ t-ZrO2 gate stack sequence have been studied, and an approach to effectively suppress leakage current has been proposed. As compared to the Al2O3/t-ZrO2/Si stack, the thermally stable t-ZrO2/Al2O3/Si stack for the gate dielectric demonstrates larger capacitance, smaller hysteresis, better frequency dispersion, lower leakage current, and more robust reliability. A further reduced leakage current can be achieved by additional NH3 nitridation of t-ZrO2 to well passivate the grain boundaries without sacrificing its κ-value. In addition to the ALD system, a Ge-stabilized t-ZrO2 film formed by depositing a ZrO2/Ge/ZrO2 laminate by an electron beam evaporation tool and a subsequent annealing was proposed, which provides a more reliable approach to control the dopant concentration. By combining thin SiON as an interfacial layer, the SiON/t-ZrO2 gate stack shows tiny amount of hysteresis and negligible frequency dispersion in capacitance voltage (C–V) characteristics. In this work, by passivating leaky channels derived from grain boundaries with NH3 plasma, good leakage current is achieved and desirable reliability is also obtained.
For the second part of this thesis, we focus on the amorphous Zr-based high-κ oxides applications, including (ZrO2)x(La2O3)1−x alloy and ZrLaOx/ZrTiOx/ZrLaOx Laminate. First, an amorphous (ZrO2)x(La2O3)1-x alloy formed by ZrO2/La2O3/ZrO2 laminate followed by a thermal annealing was integrated with a thermally grown SiON interfacial layer as a gate stack, and its chemical as well as electrical characteristics were investigated. By integrating the (ZrO2)x(La2O3)1-x alloy with an SiON interfacial layer as the gate stack, it displays good frequency dispersion in capacitance–voltage (C–V ) characteristics and low interfacial trap density of 1.52 × 1011 cm−2 eV−1 . In addition, the current conduction mechanism of the gate stack is observed to be Fowler–Nordheim tunneling and the leakage current of 3.6 × 10−6 A/cm2 at the gate voltage of −1 V for equivalent oxide thickness (EOT) of 1.1 nm can be achieved Moreover, satisfactory reliability is verified by bias temperature instability measurement. For the MIM capacitors application, ZrTiOx with an even higher κ value was found to have a negative VCC-α and its application for MIM capacitors was studied. further investigation on the possible effects of O2 annealing on VCC-α and interfacial layer formation for ZrTiOx was also performed in this work By integrating the ZrTiOx with ZrLaOx which corresponds to a positive VCC-α, MIM capacitors with ZrLaOx/ZrTiOx/ZrLaOx laminate demonstrate great potential for next-generation RF/analog ICs applications because of a high capacitance density of 14.6 fF/μm2, a low VCC-α of 33 ppm/V2, nearly frequency-dependence capacitance and satisfactory leakage performance.
In this study, to overcome the continuous scaling challenge of CMOS device, the crystalline and amorphous Zr-based high-κ dielectrics have been successfully developed for nonvolatile memory、MOS device, and MIM capacitor applications. In addition, by integrating with high quality interfacial layer or the follow-up plasma nitridation treatment, it holds the great potential for next-generation CMOS technology.

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International Technology Roadmap for Semiconductors.
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