在此篇論文中，我們將探討Ge中間層厚度的增加對Ni/Ge/Si系統反應過程的影響。
　　我們利用逸散蒸鍍源（effusion cell）分別鍍上12、20、30nm的Ge中間層，再利用電子束蒸鍍30nm的Ni。將鍍完膜的試片，經不同溫度(500~700℃)及時間(1~18小時)的退火，並即時(in situ)量測試片曲率後，利用四點探針、X光繞射分析儀、Auger電子能譜儀、穿透式電子顯微鏡附能量散佈光譜儀等儀器來觀察退火過後試片的情形。
實驗結果顯示，Ge中間層較薄的試片在較低溫(500℃)持溫退火過後，形成Ge (NiSi1-zGez、NiSi1-yGey)/ NiSi1-zGez（Si1-xGex、Ge）/Si的結構(其中y、x>z)，隨著持溫時間的增加，表面層Ge的比例亦增高。而在較高溫(700℃)持溫退火過後，形成橫向的NiSi1-zGez /Si1-xGex /NiSi1-zGez 三明治夾層結構，我們推測這是由於Si1-xGex向上成長所造成的結果，而隨著持溫時間的增加，Si1-xGex相中Ge的比例增加，而NiSi1-zGez相中的z值沒有改變。
對於Ge中間層較厚的試片(30nm)在低溫(500℃)持溫退火形成Ge、NiSi1-yGey、NiSi1-zGez/ NiSi1-zGez、Si1-xGex、Ge/NiSi2/Si結構。在高溫(700℃)持溫退火則形成橫向的NiSi1-zGez or NiSi2/Si1-xGex/ NiSi1-zGez or NiSi2三明治夾層結構，而表面有一層薄薄的Si1-xGex，我們推測此結構亦是由於Si1-xGex向上成長所造成，而隨著退火時間的增加NiSi2成長，而NiSi1-zGez逐漸減少。
比較不同Ge中間層厚度的試片，較厚Ge中間層厚度的試片(30nm)較先形成NiSi2，而Ge中間層厚度較薄的試片，即使經過高溫長時間退火(700℃18小時)也未有NiSi2形成。這是由於Ge較厚的試片在退火時，Ni原子擴散受到Ge中間層的阻擋，而在Si界面先形成NiSi2，此與一般常見鎳矽化物生成的順序有相當大的差異，我們將在論文中，利用有效生成熱的觀點，對實驗結果提出合理的說明。

In this thesis, we will investigate the influence of thickness of Ge interlayer on the reaction process of Ni/Ge/Si system.
　　We use effusion cell to deposit 12, 20, and 30nm Ge interlayer, and then deposit 30nm Ni by electron beam evaporate. During the annealing process at different temperature(500, 600, and 700℃) with different time(1~18 hr), we measure the curvature of the samples in situ. After annealing, the samples were investigated by four-point probe, X-ray diffraction(XRD), Auger Electron Spectroscopy(AES), and transmission electron microscopy(TEM) with energy dispersion spectrometer(EDX).
The result shows that if the Ge interlayer is below 20 nm, the samples formed Ge (NiSi1-zGez、NiSi1-yGey)/ NiSi1-zGez（Si1-xGex、Ge）/Si (y、x>z) structure after annealing at 500℃. As the annealing time increases, the ratio of Ge in the upper layer increases. When the annealing temperature raises to 700℃, the samples’ structures change into transverse NiSi1-zGez /Si1-xGex /NiSi1-zGez sandwich structure. We speculate that this is because the Si1-xGex grain grows upwardly. The percentage of Ge in the Si1-xGex grain increases, but does not change in the NiSi1-zGez grain as the annealing time increases at 700℃.
The samples’ structures are Ge、NiSi1-yGey、NiSi1-zGez/ NiSi1-zGez、Si1-xGex、Ge/NiSi2/Si after annealing at 500℃ as the Ge interlayer is 30nm. The structures transfer into transverse NiSi1-zGez or NiSi2/Si1-xGex/ NiSi1-zGez or NiSi2 sandwich structures, and a thin Si1-xGex layer forms at surface after annealing at 700℃. We speculate that it is also because the Si1-xGex grain grows upwardly. The NiSi2 grain grows but the NiSi1-zGez grain decreases when the annealing time increases.
NiSi2 appears early for the samples of 30nm Ge interlayer, and doesn’t be found even the annealing condition is 700℃ for 18hrs if the samples have Ge interlayer below 20nm. This is because when the thicker Ge interlayer anneals, the diffusion of Ni will be obstructed, and Ni will form NiSi2 in the Si surface. This is very different from normal nickel silicide forming sequence. We will bring up reasonable explanations to the experiment results by using the effective heat of formation.

[1] J. P. Gambino, E. G. Colgan, “Silicides and Ohmic Contacts”, 52, 99 (1998).
[2] K. K. Ng and W. T. Lynch, “The Impact of Intrinsic Series Resistance on MOSFET Scaling”, IEEE Trans. Electron Devices, ED-34, 5.3 (1987).
[3] K. C. Saraswat and F. Mohammadi, “Effect of Scaling of Interconnections on the Time Delay of VLSI Circuits”, IEEE Trans. Electron Devices, ED-29, 645 (1982).
[4] D. B. Scott, W. R. Hunter and H. Shichijo. “A Transmission Line Model for Silicide Diffusion Impact on the Performance of VLSI Circuits”, IEEE Trans. Electron Device, ED-29, 651 (1982).
[5] C. T. Chang, M. Arienzo, D. D. Tang and R. D. Isaac, “A Schottky Barrier Diode with Self-Aligned Floating Guard Ring”, IEEE Trans. Electron Devices, ED-31, 1492 (1984).
[6] S. Tohyama, K. Masubuchi, K. Konuma, H. Azuma, A. Tanabe, H. Utsumi, N. Teranishi, E. Takano, S. Yamgata, M. Hijikawa, H. Sahara, T. Muramatsu, T. Seki, T. Ono and H. Goto, “A High Fill Factor and Progressive Scan PtSi Schottky-Barrier IR-CCD Image Sensor Using New Wiring Technology”, IEEE Trans. Electron Devices ED-42, 1433 (1995).
[7] J. N. Winnerl, R. W. Fathauer, S. Mantl, L. J. Schowalter and K. N. Tu (eds.), “Silicides, Germanoides and Their Interfaces”, Vol. 320, Materials Research Soc., Pittsburgh, PA, 1994. P37.
[8] J. S. Choi, S. H. Paek, Y. S. Hwang, S. H. Choi, D. W. Kim, H. K. Moon, J. K. Chung, W. S. Paek, T. U. Sim and J. G. Lee, “Characteristicsof TiSi2 Contact to BF2-Doped Single-Silicon”, J. Mater. Sci. 28, 4878 (1993).
[9] S. P. Murarka, “Silicides for VLSI Applications” Academic New York, (1983)
[10] G. Ottaviani, “Review of Binary Alloy Formation by Thin Film Interactions”, J. Vac. Sci. Technol. 16, 1112 (1979).
[11] K. Maex, “Silicides for integrated circuits: TiSi2 and CoSi2”, Material Science and Engineering, R11, (1993)
[12] S. P. Murarka, “Metallization: Theory and Practice for VLSI and ULSI”, Butterworth-Heinemann, (1993).
[13] S. P. Murarka, “Silicides for VLSI Applications”, Academic Press, (1983).
[14] K. Maex and M. V. Rossum, “Properties of Metal Silicides”, Short Run Press, (1995).
[15] J. P. Gambino and E. G. Colgan, “Silicides and Ohmic Contacts”, Materials Chemistry and Physics, 52, 99-146 (1998).
[16] H. Iwai, T. Ohguro, and S. I. Ohmi, “NiSi Salicide Technology for Scaled CMOS”, Microelectronic Engineering, 60, 157-169 (2002).
[17] J. A. Kittle et al., “Salicides and alternative technologies for future ICs: Part 1”, Solid-State Technol . , 4 2, pp.81-92 (June, 1999). .
[18] R. P. Apte et al., “Use of a TiN cap to attain low sheet resistance for scaled TiSi2 on sub-half-micrometer polysilicon lines”, IEEE Electron Device Lett., EDL - 17, pp.506-508 (1996).
[19] K. Maex et al., “Self-aligned CoSi2 for 0.18 μm and below”, IEEE Trans. Electron Devices, ED - 4 6, pp.1545-1550(1999).
[20] T. Iinuma et al., Symp. VLSI Technol . pp.188-189 (1998).
[21] T. Ohguro et al., “Analysis of resistance behavior in Ti- and Ni-salicided polysilicon films”, IEEE Trans. Electron Devices, E D - 4 1, pp.2305-2317(1994).
[22] T. Ohguro et al., IEDM Tech, Digest. pp.453-456 (1995).
[23] J. Chen et al., “Comparison of TiSi2, CoSi2, and NiSi for Thin-Film Silicon-on-Insulator Applications”, J. Electrochem. Soc., 1 4 4, p.2437 (1997).
[24] K. N. Tu and J. W. Mayer, “Silicide Formation, in Thin Films-Interdiffusion and Reactions”, edited by J. M. Poate, K. N. Tu, and J. M. Mayer, Wiley, New York, (1978).
[25] K. Maex and M. V. Rossum, “Properties of Metal Silicides”, Short Run Press, (1995).
[26] T. Morimoto, T. Ohguro, H. S. Momose, T. Iinuma, I. Kunishima, K. Suguro, I. Katakabe, H. Nakajima, M. Tsuchiaki, M. Ono, Y. Katsumata, and H. Iwai, “Self-Aligned Nickel-Mono-Silicide Technology for High-Speed Deep Submicrometer Logic CMOS ULSI”, IEEE Transactions on Electron Devices, 42(5), 915-922 (1995).
[27] D. X. Xu, S. R. Das, C. J. Peters, and L. E. Erickson, “Material Aspects of Nickel Silicide for ULSI Applications”, Thin Solid Films, 326, 143-150 (1998).
[28] C. J. Choi, J. H. Ku, S. Choi, K. Fujiwara, J. T. Moon, “Ni Salicide Technology for Deep Sub-Quarter Micron”, Proc. ESC Symp. ULSI Process Integration, PV-2001-2, 76-77 (2000).
[29] M. Qin, M. C. Poon, and C.Y. Yuen, “A Study of Nickel Silicide Film as a Mechanical Material”, Sensors and Actuators, 87, 90-95 (2000).
[30] T. Ohguro, S. I. Nakamura, M. Koike, T. Morimoto, A. Nishuyama, Y. Ushiku, T. Yoshitomi, M. Ono, M. Saito, and H. Iwai, “Analysis of Resistance Behavior in Ti- and Ni-Salicided Polysilicon Films”, IEEE Trans. Electron Devices, 41(12), 2305-2317 (1994).
[31] F. M. d’Heurle, J. Mater. Res. 3, 167 (1988).
[32] S. Nygren, D. Caffin, M. O¨ stling, and F. M. d’Heurle, “Morphological instabilities of nickel and cobalt silicides on Silicon”, Appl. Surf. Sci. 53, 87 (1991)
[33] D. Mangelinck, P. Gas, J. M. Gay, B. Pichaud, and O. Thomas, “Effect of Co, Pt, and Au Additions on the Stability and Epitaxy of NiSi2 Films on (111)Si”, J. Applied Physics, 84(5), 2583-2590 (1998).
[34] P. S. Lee, K. L. Pey, D. Mangelinck, J. Ding, T. Osipowicz, and A. See, “Layer Inversion of Ni(Pt)Si on Mixed Phase Si Films”,Electrochem. Solid-State Lett. 5, G15 (2002).
[35] J. F. Liu, J. Y. Feng, and J. Zhu, “Film Thickness Dependence of the NiSi-to-NiSi2 Transition Temperature in the Ni/Pt/Si(100) System”, Applied Physics Letters, 80(2), 270-272 (2002).
[36] L. W. Cheng, S. L. Cheng, L. J. Chen, H. C. Chien, H. L. Lee, and F. M. Pan, “Formation of Ni Silicides on (001)Si with a Thin Interposing Pt Layer”, J. Vac. Sci. Technolo. A 18(4), 1176-1179 (2000).
[37] J. F. Liu, H. B. Chen, and J. Y. Feng, “Enhanced Thermal Stability of NiSi Films on Si(111) Substrates by a Thin Pt Interlayer”, J. Crystal Growth, 220, 488-493 (2000).
[38] J. F. Liu, H. B. Chen, J. Y. Feng, and J. Zhu, “Improvement of the Thermal Stability of NiSi Films by Using a Thin Pt Interlayer”, Applied Physics Letters, 77(14), 2177-2179 (2000).
[39] J. S. Maa, Y. Ono, D. J. Tweet, F. Zhang, and S. T. Hsu, “Effect of Interlayer on Thermal Stability of Nickel Silicide”, J. Vac. Sci. Technol. A. 19(4), 1595-1599 (2001).
[40] C.J. Tsai, P.L. Chung, and K.H. Yu, “Stress evolution of Ni/Pd/Si reaction system under isochronal annealing”, Thin Solid Films 365, 72 (2000).
[41] Jer-shen Maa, Yoshi Ono, Douglas J. Tweet, Fengyan Zhang, and Sheng Teng Hsu, “Effect of interlayer on thermal stability of nickel silicide”, J. V. Sci. Tech. A 19, 1595 (2001).
[42] T. H. Hou, T. F. Lei, and T. S. Chao, “Improvement of Junction Leakage of Nickel Silicided Junction by a Ti-Capping Layer”, IEEE Electron Device Letters, 20(11), 572-573 (1999).
[43] W. L. Tan, K. L. Pey, S. Y. M. Chooi, J. H. Ye, and T. Osipowicz, “Effect of a Titanium Cap in Reducing Interfacial Oxides in the Formation of Nickel Silicide”, J. Applied Physics, 91(5), 2901-2909 (2002).
[44] L. W. Chen, S. L. Cheng, J. Y. Chen, L. J. Chen, and B. Y. Tsui, “Effects of Nitrogen Ion Implantation on the Formation of Nickel silicide Contacts on Shallow Junctions”, Thin Solid Films, 355-356, 412-416 (1999).
[45] P. S. Lee, K. L. Pey, D. Mangelinck, J. Ding, A. T. S. Wee, and L. Chan, “Improved NiSi Salicide Process Using Presilicide N2+ Implant for MOSFETs”, IEEE Electron Device Letters, 21(12), 566-568 (2000).
[46] E. M. Schaller, B. I. Boyanov, S. English, and R. J. Nemanich, “Role of the Substrate Strain in the Sheet Resistance Stability of NiSi Deposited on Si(100)”, J. Applied Physics, 85(7), 3614-3618 (1999).
[47] J. C. Bean, “Silicon-Based Semiconductor Hetrostructures-Column IV Bandgap Engineering”, Proc. IEEE 80, 571 (1992)
[48] H. Presting, H. Kibbel, M. Jaros, R. M. Turton, U. Menczigar, G. Abstreiter, H. G. Grimmeiss, “Ultrathin Simgen Strained Layer Superlatticees-A Step Towards Si Optoelectroics”, Semicond. Sci. Technol. 1, 1127 (1992)
[49] P.-E. Hellberg, S.-L. Zhang, and C. S. Petersson, “Work function of boron-doped polycrystalline SixGe1-x films”, IEEE Electron Device Lett. EDL-18, 456 (1997).
[50] S. Gannavaram, N. Pesovic, and M. C. O¨ ztu¨rk, Tech. Dig. - Int. Electron Devices Meet. 2000, 437 (2000).
[51] K. L. Wang, and R. P. G. Karunadiri, “SiGe/Si Electronics and Optoelectronics”, J. Vac. Sci. Technol. B11, 1159 (1993)
[52] G. L. Zhou and H. Morkoc, “Si/SiGe Hetrostructures and Device”, Thin Solid Films 231, 125 (1993)
[53] T. B. Massaliki, J. L. murray, L. H. Bermett, and H. Baker, “Binary Alloy Phase Diagrams”, American Society for Metals, Metals Park, Ohio”, (1986).
[54] K. L. Pey, S. Chattopadhyay, W. K. Choi, Y. Miron, E. A. Fitzgerald and D. A. Antoniadis, T. Osipowicz, “Stability and Composition of Ni-Germanosilicided Si1-xGex Films”, J. Vac. Sci. Technol. B 22(2), 852(2004).
[55] T. Jarmar, J. Seger, F. Ericson, D. Mangelinck, U. Smith, and S.-L. Zhang, “Morphologyical and Phase Stability of Nickel-Germanosilicide on Si1-xGex Under Thermal Stess”, J. Appl. Phys. 92, 7193 (2002).
[56] H. Zhao, K. L. Pey, W. K. Choi, S. Chattopadhyay, E. A. Fitzgerald, D. A. Antoniadis, and P. S. Lee, “Interfacial Reactions of Ni on Si1-xGex (x=0.2, 0.3) at Low Temperature by Rapid Thermal Annealing”, J. Appl. Phys. 92, 214 (2002).
[57] J. Seger, S.-L. Zhang, D. Mangelinck, and H. H. Radamson, “Increased Nucleation Temperature of NiSi2 in the Reaction of Ni Thin Films with Si1-xGex”, Appl. Phys.Lett. 81, 1978 (2002).
[58] K. L. Pey, W. K. Choi, S. Chattopadhyay, H. Zhao, E. A. Fitzgerald, D. A. Antoniadis, and P. S. Lee, “Thermal Reaction of Nickel and Si0.75Ge0.25 Alloy” J. Vac. Sci. Technol. A 20, 1903 (2002).
[59] Jian Li, Q. Z. Hong and J. W. Mayer, “Interfacial Reaction Between a Ni/Ge Bilayer and Silicon (100)”, J. Appl. Phys. 67 2506(1990)
[60] R. D. Thompson, K. N. Tu, J. Angillelo, S. Delage, and S. S. Iyer, “Intertfacial Reaction Between Ni and MBE Grown SiGe Alloy.”, J. Electrochem. Soc. 135, 3161 (1988).
[61] J.-S. Luo, W.-T. Lin, C. Y. Chang, and W. C. Tsai, “Pulsed KrF laser annealing of Ni/Si0.76Ge0.24 films”, J. Appl. Phys. 82, 3621(1997).
[62] F. R. Deboer, R. Boom, W. C. Mattens, A. R. Miedema, and A. K. Niessen, “Cohesion in Metals: Transition Metal Alloys”, North-Holland,Amsterdam, (1988).
[63] C. S. Pai, E. D. Marshall, S. S. Lau, W. K. Chu, “Interminxing Between Germanium and Silicon Thin Films in the Presence of a Fast Interstitial Diffuser”, Thin Solid Films 136, 37(1986)
[64] D. B. Aldrich, F. M. d’Heurle, D. E. Sayers, and R. J. Nemanich, “Interface stability of Ti/Si/Ge and SiGe alloys: Tie lines in the ternary equilibrium diagram”, Phys.Rev. B 53, 16279 (1996).
[65] C. Detavernier, T. R. L. Van Meirhaeghe, F. Cardon, and K. Maex, “CoSi2 nucleation in the presence of Ge”, Thin Solid Films 384, 243 (2001).
[66] F. Wald and S. J. Michalik, J. Less-Common Met. 24, 277 (1971).
[67] P.-E. Hellberg, S.-L. Zhang, F. M. d’Heurle, and C. S. Petersson, “Oxidation of silicon–germanium alloys. II. A mathematical model”, J. Appl. Phys. 82, 5779 (1997) ; Mater. Res. Soc. Symp. Proc. 533, 111 (1998).
[68] 郭政彰，“鍺或銥中間層薄膜對鎳矽化物之生成與熱穩定性之研究”，國立清華大學材料所碩士論文(2002).
[69] S. M. Sze, “VLSI Technology”, McGraw-Hill, 300-302(1983).