為了因應單晶片系統對於頻寬及可擴充性的需求，單晶片網路已逐漸取代傳統匯流排成為主流的連結架構。目前單晶片網路的相關研究大多致力於提供更有效率的傳輸，只有極少數論文在探討網路頻寬分配的公平性。事實上，頻寬分配不平均的問題確實存在於網路中，因為當路由器以封包為單位輪流地分配輸出埠的使用權給來自不同輸入埠的請求時，它並沒有考慮到不同輸入埠上會有不同數量的資料流 (flow) 要競爭同一輸出埠的頻寬，這使得這些互相競爭的資料流無法公平地取得頻寬。為解決上述的問題，我們提出一個新穎的分配方式，稱為Group Allocation。它從特定的資料流中各取出一個封包來形成一個「組 (Group)」，這些資料流是由相同的輸入埠進入路由器並且會從相同的輸出埠離開。然後藉由控制請求使用輸出埠的時機將分配的機制改成以「組」單位。依照這個方法，路由器會根據資料流的數量按比例的分配頻寬給各個輸入埠。換句話說，路由器必須讓所有競爭的資料流都傳遞一個封包到下一級之後才能再傳送它們的下一個封包。因此，頻寬可以公平地分享給所有競爭者。由於「組」的組成會根據資料流之間的競爭關係自動地調整，所以 Group Allocation 可以應用在各種的交通模式下而不需要事先取得交通的行為模式。
從模擬結果中顯示， Group Allocation 確實可以公平地分配頻寬給各個競爭者，並且不會降低網路傳輸的效能。

[1] W. J. Dally and B. Towles, "Route packets, not wires: on-chip interconnection networks," in Proc. of the 38th annual Design Automation Conference, pp.684- 689, June 2001
[2] R. Mullins, A. West and S. Moore, "Low-latency virtual-channel routers for on-chip networks," in Proc. of the 31st annual International Symposium, pp.188- 197, June 2004
[3] A. Kumar, Li-Shiuan Peh, P. Kundu and N. K. Jha, "Toward Ideal On-Chip Communication Using Express Virtual Channels," Micro, IEEE , vol.28, no.1, pp.80-90, Jan.-Feb. 2008
[4] A. Kumar, P. Kundu, A.P. Singh, Li-Shiuan Peh, and N.K. Jha, "A 4.6Tbits/s 3.6GHz single-cycle NoC router with a novel switch allocator in 65nm CMOS," in Proc. of the 25th International Conference on Computer Design, pp.63-70, Oct. 2007
[5] C. Izu, "Throughput Fairness in K-ary N-cube Networks," in Proc. of the 29th Australasian Computer Science Conference, vol.171, pp.137-145, 2006.
[6] K. Goossens, J. Dielissen and A. Radulescu, "Æthereal network on chip: concepts, architectures, and implementations," Design & Test of Computers, vol.22, no.5, pp. 414- 421, Sept.-Oct. 2005
[7] J.W Lee, Ng Man Cheuk and K. Asanovic, "Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks," in Proc. of the 35th International Symposium on Computer Architecture, pp.89-100, June 2008
[8] B. Grot, S.W. Keckler and O. Mutlu, "Preemptive Virtual Clock: A flexible, efficient, and cost-effective QOS scheme for networks-on-chip," MICRO, IEEE/ACM, pp.268-279, Dec. 2009
[9] D. Abts, and D. Weisser, "Age-based Packet Arbitration in Large-radix K-ary N-cubes," Supercomputing, ACM/IEEE, pp.1-11, Nov. 2007
[10] M.M. Lee, J. Kim, D. Abts, M. Marty and J.W. Lee, "Probabilistic Distance-Based Arbitration: Providing Equality of Service for Many-Core CMPs," MICRO, IEEE/ACM, pp.509-519, Dec. 2010
[11] A. Demers, S. Keshav and S. Shenker, "Analysis and Simulation of a Fair Queueing Algorithm," SIGCOMM, ACM, pp.1-12, 1989
[12] C. Izu, "A throughput Fairness Injection Protocol for Mesh and Torus Networks," High Performance Computing, pp.294-303, Dec. 2009
[13] I. Cidon and Y. Ofek, "MetaRing-a Full-duplex Ring with Fairness and Spatial Reuse," IEEE Transactions on Communications, vol.41, no.1, pp.110-120, Jan. 1993
[14] W. J. Dally and B. Towles, "Principles and Practices of Interconnection Networks" Morgan-Kaufmann, 2004
[15] M. Galles, "Spider: a High-Speed Network Interconnect," Micro, IEEE, vol.17, no.1, pp.34-39, Jan.-Feb. 1997
[16] D. U. Becker and W. J. Dally, "Allocator Implementations for Network-on-Chip Routers," High Performance Computing Networking, Storage and Analysis, 2009
[17] "NIRGAM: A Simulator for NoC Interconnect Routing and Application Modeling," http://nirgam.ecs.soton.ac.uk/home.php, Sept. 2007