經由固相磊晶的技術，我們沉積一層非晶的錫化鍺薄膜且經過550度的快速熱退火後，可以成功在鍺基板上形成磊晶的錫化鍺。在退火之前，我們必須覆蓋一層二氧化矽在非晶的錫化鍺上，這是因為防止退火時錫在錫化鍺表面發生沉澱，所以我們藉由降低錫原子的表面遷移率，而得到平滑的表面結構。在物性分析方面，我們從TEM、EDS、XRD以及AFM上得知磊晶的錫化鍺薄膜擁有單晶的結構、均勻的厚度及成分以及很小的表面粗糙度（RMS = 0.56 nm），證明此為一高品質的薄膜。而從XPS的分析上，可看出利用HF/HCl的混合溶液即可去除錫化鍺表面的錫氧化物，進而可製作出氧化層為Yb2O3的MOS電容，且等效氧化層厚度只有0.55 nm。在電性分析方面，因為電容的磁滯小到幾乎可忽略，可得知Yb2O3裡的缺陷很少。我們也量測到在很小的EOT時，閘極的漏電流只有0.4 A/cm2，證明了使用Yb2O3當作閘極氧化層是可行的。總之，根據先前介紹的特點，相信利用此方法製作出的磊晶錫化鍺將有益於高效能錫化鍺MOS元件的實現。

第一章
[1.1] K. Mistry, M. Armstrong, C. Auth, S. Cea, T. Coan, T. Ghani, T. Hoffmann, A. Murthy, J. Sandford, R. Shaheed, K. Zawadzki, K. Zhang, S. Thompson, and M. Bohr, “Delaying forever：uniaxial strained silicon transistors in a 90 nm CMOS technology,” in Symp. VLSIT, p. 50, Jun. 2004.
[1.2] J. D. Sau, and M. L. Cohen, “Possibility of increased mobility in Ge-Sn alloy system,” Phys. Rev. B, vol. 75, p. 045208, 2007.
[1.3] S. Gupta, B. Vincent, B. Yang, D. Lin, F. Gencarelli, J.-Y. J. Lin, R. Chen1, O. Richard, H. Bender, B. Magyari-Köpe, M. Caymax, J. Dekoster, Y. Nishi, and K. C. Saraswat, “Towards high mobility GeSn channel nMOSFETs: improved surface passivation using novel ozone oxidation method,” in Proc. IEEE IEDM, pp. 375-378, 2012.
[1.4] G. Han, S. Su, L. Wang, W. Wang, X. Gong, Y. Yang, Ivana, P. Guo, C. Guo, G. Zhang, J. Pan, Z. Zhang, C. Xue, B. Cheng, and Y. C. Yeo, “Strained germanium-tin (GeSn) n-channel MOSFETs featuring low temperature N+/P junction formation and GeSnO2 interfacial layer,” in Proc. Symp. VLSIT, pp. 97-98, 2012.
[1.5] S. Gupta, Y. C. Huang, Y. Kim, E. Sanchez, and K. C. Saraswat, “Hole mobility enhancement in compressively strained Ge0.93Sn0.07 pMOSFETs,” IEEE Electron Device Lett., vol. 34, no. 7, pp. 831-833, 2013.
[1.6] L. Wang, S. Su, W. Wang, X. Gong , Y. Yang, P. Guo, G. Zhang, C. Xue, B. Cheng, G. Han, Y. C. Yeo, “Strained germanium–tin (GeSn) p-channel metal-oxide-semiconductor field-effect-transistors (p-MOSFETs) with ammonium sulfide passivation,” Solid-State Electronics, vol. 83, pp. 66-70, 2013.
[1.7] S. Gupta, R. Chen, B. M. Kope, H. Lin, B. Yang, A. Nainani, Y. Nishi, J. S. Harris,
and K. C. Saraswat, “GeSn technology: extending the Ge electronics roadmap,” in Proc. IEEE IEDM, pp. 398-401, 2011.
[1.8] Y. Yang, G. Han, P. Guo, W. Wang, X. Gong, L. Wang, K. L. Low, and Y. C. Yeo, “Germanium–tin p-channel tunneling field-effect transistor: device design and technology demonstration,” IEEE Trans. Electron Devices, vol. 60, no. 12, pp. 4048-4056, 2013.
[1.9] R. R. Lieten, J. W. Seo, S. Decoster, A. Vantomme, S. Peters, K. C. Bustillo,
E. E. Haller, M. Menghini, and J.-P. Locquet, “Tensile strained GeSn on Si by solid phase epitaxy,” Appl. Phys. Lett., vol. 102, no. 5, p. 052106, 2013.
[1.10] S. Gupta, R. Chen, B. Vincent, D. H. C. Lin, B. Magyari-Köpea, M. Caymax, J. Dekoster, J. Harris, Y. Nishi, and K. C. Saraswat, “GeSn Channel n and p MOSFETs” ECS Trans, vol. 50, no. 9, pp. 937-941, 2012.
[1.11] Y. Kamata, Y. Kamimuta, T. Ino, and A. Nishiyama, “Direct comparison of ZrO2 and HfO2 on Ge substrate in terms of the realization of ultrathin high-k gate stacks,” Jpn. J. Appl. Phys., vol. 44, p. 2323, 2005.
[1.12] Y. H. Wu, L. L. Chen, W. C. Chen, C. C. Lin, M. L. Wu, and J. R. Wu, “MOS devices with tetragonal ZrO2 as gate dielectric formed by annealing ZrO2/Ge/ZrO2 laminate,” Microelectron. Eng., vol. 88, p. 1361, 2011.
[1.13] Y. Liu, S. Shen, L. J. Brillson, and R. G. Gordon, “Impact of ultrathin Al2O3 barrier layer on electrical properties of LaLuO3 metal-oxide-semiconductor devices,” Appl. Phys. Lett., vol. 98, p. 122907, 2011.
[1.14] Delabie, F. Bellenger, M. Houssa, T. Conard, and S. V. Elshocht, “Effective electrical passivation of Ge(100) for high-k gate dielectric,” Appl. Phys. Lett., vol. 91, p. 082904, 2007.
[1.15] X. F. Li, X. J. Liu, W. Q. Zhang, Y. Y. Fu, and A. D. Li, “Comparison of the interfacial and electrical properties of HfAlO films on Ge with S and GeO2 passivation,” Appl. Phys. Lett., vol. 98, p. 162903, 2011.
[1.16] D. Kuzum, A. J. Pethe, T. Krishnamohan, Y. Oshima, Y. Oshima, Y. Sun, J. P. McVittie, P. A. Pianetta, P. C. McIntyre, and K. C. Saraswat, “Interface-engineered Ge (100) and (111) , N- and P-FETs with high mobility,” in IEDM Tech. Dig., p. 723, 2007.
[1.17] N. Taoka, W. Mizubayashi, Y. Morita, S. Migita, and H. Ota, “Physical origins of mobility enhancement of Ge p-channel metal-insulator-semiconductor field effect transistors with Si passivation layers,” J. Appl. Phys., vol. 108, p. 104511, 2010.

第二章
[2.1] G. Han, S. Su, C. Zhan, Q. Zhou, Y. Yang, L. Wang, P. Guo, W. Wei, C. P. Wong, Z. X. Shen, B. Cheng, and Y. C. Yeo, “High-mobility germanium-tin (GeSn) p-channel MOSFETs featuring metallic source/drainand sub-370 °C process modules,” in Proc. IEEE IEDM, pp. 402-404, 2011.
[2.2] M. Zhao, R. Liang, J. Wang, and J. Xu, “Effects of sulfur passivation on Ge/GeSn MOS capacitors with HfO2 gate dielectric,” in Abstract 224th ECS meeting, 2013.

第三章
[3.1] R. R. Lieten, S. Decoster, M. Menghini, J. W. Seoc, A. Vantommea, and J.-P. Locquet, “Single crystalline GeSn on silicon by solid phase crystallization” ECS Trans, vol. 50, no. 9, pp. 915-920, 2012.