研究生: |
彭任佑 Peng, Jen-Yu |
---|---|
論文名稱: |
可撓式電容脈搏感測器陣列與CMOS感測電路之設計與製作 Design and Implementation of a Flexible Pulse Sensor Array and CMOS Readout Circuit |
指導教授: |
盧向成
Lu, Shiang-Cheng |
口試委員: |
羅錦興
邱一 |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 電子工程研究所 Institute of Electronics Engineering |
論文出版年: | 2013 |
畢業學年度: | 101 |
語文別: | 中文 |
論文頁數: | 76 |
中文關鍵詞: | 脈搏 、CMOS 、軟性 、CDS 、時序 |
外文關鍵詞: | pulse, CMOS, flexible, CDS, timing |
相關次數: | 點閱:3 下載:0 |
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本論文設計並製作出一個脈搏壓力感測器,藉由整合積體電路技術與軟性材料電路板製作而成,藉由電路設計以達到快速取樣脈搏壓力的效用。
製程上使用了TSMC 0.35-um 2P4M CMOS標準製程定義電路,以兩片雙層軟性電路板在10mm×7.5mm的空間中製作出5×5電容式脈搏壓力感測器陣列,將其與CMOS晶片做結合。
其位移的變化造成感測結構的電容變化,藉由時序選取電路結合CDS(Correlated double sampling)電路之架構再以sample and hold電路做取樣。晶片中總共有5組感測電路,每組感測電路控制5顆感測器,採用NI(National Instruments)之PCIE 系統輸出控制時序,以達到分時分段擷取訊號的目的。
量測結果顯示電路噪聲為104 dbv/√ Hz、感測度為1.4153 mV/mm-Hg,量測到的脈搏頻率為1.5Hz、換算壓力為93.13mm-Hg。
This paper reports the development of a capacitive pulse sensor array using flexible printed circuit board and its CMOS readout circuit. The circuit design allows fast sampling to achieve simultaneous recording of pulse pressure.
The readout circuit chip is fabricated by using the TSMC 0.35-um 2P4M CMOS process. The 5×5 capacitive sensor array is placed within an area of 10 mm × 7.5 mm and fabricated by assembling two flexible printed circuit boards. Each board has two copper layers on top and bottom. The two chips are electrically connected by wire bond.
Capacitance change is produced due to the change in the displacement of the sensing structure. Each sensing pixel is selected by clocks and the signal is processed through correlated double sampling and sample-and-hold. Clock signals are produced by the NI (National Instruments) PCIE timing control system.
The measured result shows the noise of circuit is 104dbv/√ Hz, the sensitivity is 1.4153 mV/mm-Hg , and the pulse frequency is 1.5Hz. The measured pulse pressure is 93.13 mm-Hg.
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