在本篇論文中，我們使用了0.35μm SiGe BiCMOS 製程設計一個可操作至射頻範圍的主動電感，並將設計的主動電感應用於實際電路中。第一章描述本篇論文的研究動機以及各章節的組織安排。第二章中，我們討論了現代製程中常被使用的各式電感，包含平面螺旋電感、金屬打線電感和以gyrator為核心結構的主動式電感。在第三章中，我們討論不同的設計考量與電路結構內各元件對主動電感特性的影響。其中，使用一個回授電阻可以有效的提升電感的品質因素，再加上一個額外的電容可以改變主動電感的等效電感值。結合這兩種方法可以輕易的設計出品質因素大於20的主動電感，並在某些特定的場合能夠有效的取代由晶圓廠所提供的平面螺旋電感，除了有效提升品質因素，主動電感並可以明顯的減少晶片面積消耗。第四章中，我們比較分別使用平面螺旋電感和主動電感當負載的低雜訊放大器，其中使用被動電感當負載的S11 和 S22 皆在5.2GHz時小於-10dB，S21 為 15.9dB，雜訊指數為2.25dB，功率消耗為11.6mW。而主動負載的低雜訊放大器同樣具有S11 and S22 在5.2GHz時小於-10dB，S21 為 20dB，雜訊指數為4dB，功率消耗為16.5mW。最後於第五章為本論文結論與未來繼續研究的方向。

In this thesis, a 0.35μm SiGe BiCMOS gyrator cell active inductor has been designed and realized into circuit. In the first chapter, motivation and thesis organization is introduced. In Chapter 2, different types of inductor are discussed, including spiral inductor, bond-wire inductor and active inductor. In Chapter 3, based on gyrator cell, different effects caused by different components in the circuit are simulated. Using a feedback resistor technique and an additional capacitor can generate an inductance whenever we need. The quality factor of these active inductors can remain above 20 easily. Spiral inductors provide by the foundry can be substituted in some cases by active inductor. Using spiral inductor provides high performance at quality factor and can shrink the chip area significantly. In Chapter 4, a SiGe cascode Low Noise Amplifier with active inductive load and passive inductive load are designed. And their performance are compared. S11 and S22 of the passive load are smaller than -10dB. S21 equals to 15.9dB. Noise Figure equals to 2.25dB and the power dissipation equals to 11.6mW. The other circuit with active load has S11 and S22 below -10dB at 5.2GHz. S21 equals to 20dB. Noise Figure equals to 4 dB. Power dissipation of the total circuit equals to 16.5mW. Finally, in Chapter 5, conclusion of this work and a short future work are given.

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