研究生: |
梁玄翰 Liang, Syuan-Han |
---|---|
論文名稱: |
使用混合元件庫之設計的布局合法化演算法 A Legalization Approach for Mixed-Row-Height Designs |
指導教授: |
麥偉基
Mak, Wai-Kei |
口試委員: |
陳勝雄
Chen, Sheng-Hsiung 王廷基 Wang, Ting-Chi |
學位類別: |
碩士 Master |
系所名稱: |
電機資訊學院 - 資訊工程學系 Computer Science |
論文出版年: | 2020 |
畢業學年度: | 108 |
語文別: | 英文 |
論文頁數: | 44 |
中文關鍵詞: | 混合元件庫 、布局合法化 、物理設計 、設計自動化 、超大型積體電路設計 、混合列高 |
外文關鍵詞: | legalization, mixed-row-height, physical design automation, VLSI design, mixed libraries, double-row-height |
相關次數: | 點閱:4 下載:0 |
分享至: |
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
當前積體電路設計與製造的製程越來越進步,在同一製程下,不同的
元件庫所造成的耗能、設計面積和效能(PPA) 差異也可能相當可觀。因此,
使用混合元件庫的設計概念被提出以更進一步地改善同一製程下的PPA 表
現。使用混合元件庫的設計可以依據各個標準元件對效能的需求選取最適
當的元件庫中的版本並放置到相應高度的列上,以此達到更好的布局密度
和效能。然而,使用混合元件庫(交錯列高) 的設計和傳統單一元件庫(等列
高) 的設計在實體設計的各個環節上都有極大的差異,亦需要各種新的演算
法來解決。在布局合法化的環節上,重疊的標準元件應該被分開並合法擺
放,但在使用混合元件庫的設計下,任何元件的移動都可能導致它被放在
另一種列高的列上,此時該元件就必須透過換版本來挑選一個符合此列的
元件庫中的版本來做擺放。然而,版本的變換常常伴隨著元件面積的改變,
更極可能因此導致新的與其他元件重疊的狀況。另外,在變換版本時,我
們也不希望因此而使元件的驅動能力下降進而導致設計上的時序違反。在
本論文中,我們提出了一個3 階段的布局合法化演算法來解決使用混合元
件庫之設計的布局合法化問題。首先,我們透過一個基於當前位置最接近
的列的列高進行版本變換的方法來使各元件的版本最大程度的符合其所最
接近的列。接著,我們提出了一個基於蒙地卡羅演算法的版本變換方法來
緩和各局部區域各種布局資源(不同列高) 被過度使用的狀況。最後,我們
使用一個以Abacus 為基礎的演算法在最小化移動量下實際將各元件擺放至
合法位置。實驗結果顯示我們的方法可以有效的解決使用混合元件庫之設
計的布局合法化問題。除此之外,實驗結果也顯示出使用混合元件庫之設
計相較傳統單一元件庫的設計可以在線長和布局面積上獲得好處。
While technology nodes become more and more advance, different standard
cell libraries in the same technology node may create significant differences in
power, area and performance (PPA). To better improve PPA in such technology
nodes, a latest design concept makes of the mixed row heights is proposed. This
concept combines different standard cell libraries and mixes their corresponding
rows into a mixed row configuration. However, a mixed-row-height design is very
different from the traditional uniform-row-height design and needs new methods
throughout the whole physical design flow. In the legalization stage, overlaps between
cells have to be removed and each cell should be placed to align to placement
sites, which may require cells to move from its current position. In a mix-row-height
design, such movement of a cell may result in placing the cell on different
rows with different row heights. To legalize the cross-row movement, the cell
must be changed into a version in the standard cell library corresponding to the
row it is going to be placed on. Nevertheless, the change in version will alter the
cell size and possibly create new overlaps with other cells and macros. Besides,
version changes may also alter the driving strength of a cell and should be carefully
taken care of if we do not want to create unacceptable timing violations. In
this work, we propose a three-stage approach to tackle the mixed-row-height design
legalization problem under the constraint that the driving strength of every
cell not to be dropped comparing to the global placement result. First, we propose
a position-based version alignment method to make the global placement result
more compatible to the mixed-row-height row configuration. Then, we change the version assignment of cells by a Monte-Carlo-based algorithm to mitigate the
local congestion on each resource (placement resources of different row heights).
Finally, we use an Abacus-based method to legalize the placement with minimal
average displacement. Experimental results show that we can successfully legalize
mixed-row-height designs. In addition, experimental results also show that mixed-row-
height designs can gain advantages on area and wirelength comparing to the
uniform-row-height designs.
[1] P.-S. Chiu, “Placement legalization for designs with mixed-height cells and rows,” Master’s
thesis, National Tsing Hua University, Hsinchu, Taiwan, 2019.
[2] X. He, T. Huang, L. Xiao, H. Tian, and E. F. Y. Young, “Ripple: A robust and effective
routability-driven placer,” IEEE Transactions on Computer-Aided Design of Integrated
Circuits and Systems, vol. 32, pp. 1546–1556, Oct. 2013.
[3] T. Lin, C. Chu, J. R. Shinnerl, I. Bustany, and I. Nedelchev, “Polar: A high performance
mixed-size wirelengh-driven placer with density constraints,” IEEE Transactions
on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, pp. 447–459,
March 2015.
[4] C. Huang, H. Lee, B. Lin, S. Yang, C. Chang, S. Chen, Y. Chang, T. Chen, and I. Bustany,
“Ntuplace4dr: A detailed-routing-driven placer for mixed-size circuit designs with
technology and region constraints,” IEEE Transactions on Computer-Aided Design of Integrated
Circuits and Systems, vol. 37, pp. 669–681, 2018.
[5] A. B. Kahng, P. Tucker, and A. Zelikovsky, “Optimization of linear placements for wirelength
minimization with free sites,” Proceedings of the ASP-DAC ’99 Asia and South
Pacific Design Automation Conference 1999, vol. 1, pp. 241–244, Jan. 1999.
[6] S. Popovych, H. Lai, C. Wang, Y. Li, W. Liu, and T. Wang, “Density-aware detailed placement
with instant legalization,” 2014 51st ACM/EDAC/IEEE Design Automation Conference,
June 2014.
[7] Min Pan, N. Viswanathan, and C. Chu, “An efficient and effective detailed placement algorithm,”
IEEE/ACM International Conference on Computer-Aided Design, 2005., pp. 48–
55, Nov. 2005.
[8] C.-C. Lo, “Mixed-height cell placement legalization for mixed-row-height designs considering
displacement and wirelength optimization,” Master’s thesis, National Tsing Hua
University, Hsinchu, Taiwan, 2019.
[9] S. Dobre, A. B. Kahng, and J. Li, “Mixed cell-height implementation for improved design
quality in advanced nodes,” 2015 IEEE/ACM International Conference on Computer-
Aided Design, pp. 854–860, 2015.
[10] A. B. Kahng, I. L. Markov, and S. Reda, “On legalization of row-based placements,”
Proceedings of the 14th ACM Great Lakes symposium on VLSI, pp. 214–219, 2004.
[11] U. Brenner, “Bonnplace legalization: Minimizing movement by iterative augmentation,”
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 32,
pp. 1215–1227, Aug. 2013.
[12] J. Chen, Ziran Zhu, W. Zhu, and Y. Chang, “Toward optimal legalization for mixedcell-
height circuit designs,” 2017 54th ACM/EDAC/IEEE Design Automation Conference,
2017.
[13] C. Wang, Y. Wu, J. Chen, Y. Chang, S. Kuo, W. Zhu, and G. Fan, “An effective legalization
algorithm for mixed-cell-height standard cells,” 2017 22nd Asia and South Pacific Design
Automation Conference, pp. 450–455, 2017.
[14] P. Spindler, U. Schlichtmann, and F. M. Johannes, “Abacus: fast legalization of standard
cell circuits with minimal movement,” Proceedings of the 2008 international symposium
on Physical design, pp. 47–53, 2008.
[15] W. Chow, C. Pui, and E. F. Y. Young, “Legalization algorithm for multiple-row height
standard cell design,” 2016 53nd ACM/EDAC/IEEE Design Automation Conference,
2016.
[16] N. K. Darav, I. S. Bustany, A. Kennings, D. Westwick, and L. Behjat, “Eh?legalizer: A
high performance standard-cell legalizer observing technology constraints,” ACM Transactions
on Design Automation of Electronic Systems, vol. 23, May 2018.
[17] T.-L. Hsuiung, “Placement legalization for mixed-row-height designs,” Master’s thesis,
National Tsing Hua University, Hsinchu, Taiwan, 2020.
[18] Y. Chen, A. B. Kahng, G. Robins, and A. Zelikovsky, “Monte-carlo algorithms for layout
density control,” Proceedings 2000. Design Automation Conference., pp. 523–528, 2000.
[19] I. S. Bustany, D. Chinnery, J. R. Shinnerl, and V. Yutsis, “Ispd 2015 benchmarks with
fence regions and routing blockages for detailed-routing-driven placement,” Proceedings
of the 2015 Symposium on International Symposium on Physical Design, pp. 157–164,
March 2015.