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研究生: 黃致學
Chih-Hsieh Huang
論文名稱: 用於即時高動態範圍視訊之梯度域暨全域色調轉換器的設計與實現
Design and Implementation of Gradient Domain Compression and Photographic Tone Mapping for Real-Time High Dynamic Range Video
指導教授: 邱□德
Ching-Te Chiu
口試委員:
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 資訊工程學系
Computer Science
論文出版年: 2007
畢業學年度: 96
語文別: 英文
論文頁數: 68
中文關鍵詞: 高動態範圍影像色調對應即時區塊性梯度域高動態範圍壓縮演算法全域高動態範圍演算法
外文關鍵詞: Gradient Domain Compression, Photographic Tone Mapping, High Dynamic Range, HDR, Low Dynamic Range, Tone Mapping, Tone Reproduction, Global Tone Mapping, ASIC, Application-specific integrated circuit
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  •   高動態範圍影像及視訊是近年來迅速發展的科技。它能比傳統的影像容納更高的色彩對比,所以能最忠實地呈現出場景的真實面貌。但由於格式與傳統顯示器及其它舊有設備無法相容,是故我們需要轉換高動態範圍成為傳統之低動態範圍格式,此即稱為調性轉換。
      在這一篇論文裡,我們設計以及實現了一個整合了兩種調性轉換的演算法,並實際合成、佈局和模擬。模擬結果顯示在台灣積體電路之.13 μm製程下,可以在100MHz的速度進行操作,同時其面積為14.059平分公釐,消耗177.147毫瓦特之功率。同時對硬體計做了大幅度的改善以及最佳化。


    HDR (High Dynamic Range) is a technology that can sample and restore the colors of our real world extremely loyally, but cannot be displayed or used on conventional devices without properly reproducing. As a result, there are several tone mapping methods proposed to transform HDR to common formats so that we could utilize HDR more widely.
    In this thesis, we design an integrated hardware architecture to perform two different real-time High Dynamic Range Compression methods (Gradient Domain Compression and Global Tone Mapping) in one chip. The speed of our chip is improved from 50 MHz to 100 MHz in TSMC .13 μm technology, and it has an area of 14.059 mm2 with consuming a power of 177.147 mW. In the meantime, the critical paths and internal architecture in those two designs are also improved and well-optimized.

    Abstract (Chinese) ii Abstract iii Acknowledgement (Chinese) iv Acknowledgement v List of Figures viii List of Tables x Chapter 1 Introduction 1 1.1 Motivation and Recent Work 1 1.2 Contributions 2 1.3 Organization 3 Chapter 2 Gradient Domain Tone Mapping 5 2.1 Overview 5 2.2 The Algorithm 5 2.2.1 The Background 5 2.2.2 Gradient Domain HDR Compression 7 2.2.3 Block-Based Gradient Compression Algorithm 10 2.2.4 Block-based Gradient Attenuation Function 12 2.2.5 Block-based DST Poisson Solver 16 2.3 Gradient HDR Compression Architecture 18 2.3.1 Top level architecture 18 2.3.2 DST Hardware Architecture 19 2.3.3 Fully-Pipelined Exponent Function 20 2.4 Improvements 22 Chapter 3 Global Tone Mapping 28 3.1 Overview 28 3.2 The Global Tone Mapping Algorithm 28 3.2.1 Global Tone Mapping and Color Reproduction 28 3.2.2 Wordlength And Precision 31 3.2.3 Real-time Photographic Tone Mapping Processor 34 Chapter 4 Hardware Implementation of Integrated Gradient/PhotographicTM 38 4.1 Overview 38 4.2 Chip Architecture 38 4.3 Chip Implementation 40 4.3.1 BIST (Built-In Self-Test) Modules 41 4.4 Chip Performance Analysis 48 4.4.1 Distribution of Delays 48 4.4.2 Distribution of Area 50 4.5 Simulation Result 51 4.6 Synthesize Result 55 Chapter 5 Conclusions and Future works 61 5.1 Conclusion 61 5.2 Future works 62 References (Bibliography) 64

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