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研究生： 林嶸勳
Lin, Jung-Hsun
論文名稱： CMOS毫米波鎖相迴路設計與分析
Design and Analysis of Millimeter-Wave Phase-Locked Loop in CMOS Technology
指導教授： 劉怡君
Liu, Jenny Yi-Chun
口試委員: 徐碩鴻
Hsu, Shuo-Hung
李俊興
Li, Chun-Hsing
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電子工程研究所
Institute of Electronics Engineering
論文出版年： 2019
畢業學年度： 107
語文別： 英文
論文頁數： 88
中文關鍵詞： 鎖相迴路 、震盪器 、毫米波 、除頻器 、注入鎖定 、次諧頻
外文關鍵詞： phase-locked loop, oscillator, millimeter-wave, divider, injection-locked, sub-harmonic
相關次數： 點閱：2  下載：0 
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    • 早期毫米波波段的電路大部分都是使用Ⅲ-Ⅴ族元素的元件進行設計，但是Ⅲ-Ⅴ族元件的成本相較於CMOS元件要來的高，且整合難度也較高，因此高頻段的電路普及化就相當不易。如今隨著CMOS的製程演進，已經擺脫早期電晶體的截止頻率過低的問題，增加了使用CMOS元件來實現兆赫波電路的可行性。
    本論文主要探討在不同的奈米等級下實現94 GHz 和 0.34 THz 的鎖相迴路晶片，這些電路都將以CMOS的製程技術實現，以達到降低成本、高度整合且具功能運作的電路。
    首先為操作在V band 的注入式鎖定壓控震盪器，其中抱括一個20 GHz 和60 GHz 的壓控震盪器，並使用20 GHz的訊號去鎖定60 GHz的訊號，目的是使60 GHz的相位雜訊去追蹤20 GHz 的相位雜訊，以達到較低的相位雜訊。
    在W band 的鎖相迴路中採用tsmc 90nm CMOS 的製程，其中的電路包括二倍頻輸出的壓控震盪器、除頻器、相位-頻率偵測器、充電泵和低通濾波器。震盪器的部分使用在電晶體閘極端增加相位延遲的技術來增加輸出功率，在震盪器單獨量測的結果，輸出功率在94 GHz可以達到-17.8 dBm；注入式鎖定除頻器則是使用雙重路徑的注入技術去增加鎖定頻率的範圍。
    最後0.34兆赫波的鎖相迴路中則使用 tsmc 40nm CMOS的製程去實現，其中的電路將W band 的二倍頻壓控震盪器改成三倍頻考畢茲震盪器，考畢茲震盪器架構的相位雜訊較一般震盪器架構要來的低，原因是因為考畢茲震盪器的脈衝靈敏度函數較一般的震盪器來的對稱，因此元件雜訊較難轉換成相位雜訊；注入式鎖定除頻器也從原本除以二的電路改為除以三的電路，如此可以減少除頻器的數目，以此減少鎖相迴路整體的功率消耗，另外採用增加次諧頻功率的技術，來達到最大的鎖定範圍。

    In early times, most millimeter-wave circuits are designed by Ⅲ-Ⅴ semi-conductor technologies, but the cost of Ⅲ-Ⅴ semi-conductors is expensive and Ⅲ-Ⅴ semi-conductors is hard to integrate, which lead the limited popularity of millimeter-wave circuits. With the improvement of the CMOS technology, the problem of the low cut-off frequency has been solved, and the feasibility of using CMOS components to implement terahertz circuits has increased.
    This thesis focuses on implementing 94 GHz and 0.34 THz phase-locked loop at different nanoscales and these circuits will be realized in CMOS process technology to achieve cost-reduced, highly integrated and functional work circuits.
    The W-band high output power phase-locked loop in 90-nm CMOS is presented, which composed of the push-push voltage controlled oscillator, frequency dividers, phase-frequency detector, charge pump and low pass filter. To enhance the 94 GHz output power, the phase delay is added in front of the transistor gate. The output power can achieve -17.8 dBm at 94 GHz. A dual path injection technology is proposed for the injection-locked frequency divider to achieve wide locking range.
    The 0.34 THz phase-locked loop is implemented in the TSMC 40nm CMOS process, in which the circuit changes the W band push-push oscillator to the triple-push Colpitts oscillator. The phase noise of the Colpitts oscillator is lower than a conventional oscillator; due to the impulse sensitivity function of the Colpitts oscillator is relatively symmetrical. The divide-by-two injection-locked frequency divider is also changed to divide-by three. As such, the overall power consumption of the phase-locked loop can be reduced. Furthermore, the technique of increasing the power of the second harmonic is proposed to achieve the maximum locking range.

    摘要 i ABSTRACT ii 致謝 iii Contents iv List of Figures vi List of Tables x Chapter 1 Introduction 1 1.1. Background and Motivation 1 1.2. Thesis Organization 2 Chapter 2 Phase-Locked Loop Fundamentals 3 2.1. System Models of Phase-Locked Loops 3 2.1.1 Type-I PLLs 3 2.1.2 Type-II PLLs 5 2.1.2.1 2nd Order PLL with 1st Oder Loop Filter 6 2.1.2.2 3rd Order PLL with 2nd Oder Loop Filter 9 2.1.2.3 4th Order PLL with 3rd Oder Loop Filter 11 2.2. Key components of the phase locked loop 12 2.2.1 Design of the voltage-controlled oscillators 12 2.2.2 Design of the injection-locked frequency dividers 19 Chapter 3 A V Band Injection-Locked Voltage-Controlled Oscillator in 90-nm CMOS 23 3.1. Overall Circuit Architecture 23 3.2. Circuit Design 24 3.3. Simulation and Measurement Results 29 3.4. Conclusions 35 Chapter 4 A W Band High Output Power Phase-Locked Loop in 90-nm CMOS 37 4.1. Overall Circuit Architecture 37 4.2. Key components of the W Band PLL 39 4.2.1 A High Output Power Push-Push Oscillator 39 4.2.2 A Wide-Locking Range Injection-Locked Frequency Divider by Dual-Port Injections 47 4.3. PCB Design 50 4.4. Simulation and Measurement Results 52 4.5. Conclusions 59 Chapter 5 A 0.34 THz Signal Source Generator in 40-nm CMOS 61 5.1. Overall Circuit Architecture 61 5.2. Key components of the 0.34 THz Signal Source 62 5.2.1 A Triple-Push Drain Combined Colpitts Oscillator 62 5.2.2 A Wide-Locking-Range Subharmonic Enhanced Injection-Locked Frequency Divider 69 5.3. Simulation and Measurement Results 74 5.4. Conclusions 81 Chapter 6 Conclusions and Future Works 82 Reference 84

    [1] B. Razavi, "A 60-GHz CMOS receiver front-end," in IEEE Journal of Solid-State Circuits, vol. 41, no. 1, pp. 17-22, Jan. 2006.
    [2] C. H. Doan, S. Emami, A. M. Niknejad and R. W. Brodersen, "Design of CMOS for 60GHz applications," 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519), San Francisco, CA, 2004, pp. 440-538 Vol.1.
    [3] E. J. Baghdady, R. N. Lincoln and B. D. Nelin, "Short-term frequency stability: Characterization, theory, and measurement," in Proceedings of the IEEE, vol. 53, no. 7, pp. 704-722, July 1965.
    [4] E. J. Baghdady, R. N. Lincoln and B. D. Nelin, "Short-term frequency stability: Characterization, theory, and measurement," in Proceedings of the IEEE, vol. 53, no. 7, pp. 704-722, July 1965.
    [5] E. J. Baghdady, R. N. Lincoln and B. D. Nelin, "Short-term frequency stability: Characterization, theory, and measurement," in Proceedings of the IEEE, vol. 53, no. 7, pp. 704-722, July 1965.
    [6] A. Hajimiri and T. H. Lee, "A general theory of phase noise in electrical oscillators," in IEEE Journal of Solid-State Circuits, vol. 33, no. 2, pp. 179-194, Feb. 1998.
    [7] R. Adler, "A Study of Locking Phenomena in Oscillators," in Proceedings of the IRE, vol. 34, no. 6, pp. 351-357, June 1946.
    [8] J. Lee and H. Wang, "Study of Subharmonically Injection-Locked PLLs," in IEEE Journal of Solid-State Circuits, vol. 44, no. 5, pp. 1539-1553, May 2009.
    [9] X. Zhang, X. Zhou, B. Aliener and A. S. Daryoush, "A study of subharmonic injection locking for local oscillators," in IEEE Microwave and Guided Wave Letters, vol. 2, no. 3, pp. 97-99, March 1992.
    [10] L. J. Paciorek, "Injection locking of oscillators," in Proceedings of the IEEE, vol. 53, no. 11, pp. 1723-1727, Nov. 1965.
    [11] H. L. Stover, "Theoretical explanation for the output spectra of unlocked driven oscillators," in Proceedings of the IEEE, vol. 54, no. 2, pp. 310-311, Feb. 1966.
    [12] B. N. Biswas, "On the output spectra of unlocked driven oscillators," in Proceedings of the IEEE, vol. 58, no. 5, pp. 833-834, May 1970.
    [13] B. Razavi, "A study of injection locking and pulling in oscillators," in IEEE Journal of Solid-State Circuits, vol. 39, no. 9, pp. 1415-1424, Sept. 2004.
    [14] J. Borremans, M. Dehan, K. Scheir, M. Kuijk, and P. Wambacq, "VCO Design for 60 GHz Applications Using Differential Shielded Inductors in 0.13 μm CMOS," in Proc. IEEE Radio Freq. Integr. Circuits Symp., 2008, pp. 135-138.
    [15] P. You and T. Huang, "A Switched Inductor Topology Using a Switchable Artificial Grounded Metal Guard Ring for Wide-FTR MMW VCO Applications," in IEEE Transactions on Electron Devices, vol. 60, no. 2, pp. 759-766, Feb. 2013
    [16] D. D. Kim et al., "A 70GHz Manufacturable Complementary LC-VCO with 6.14GHz Tuning Range in 65nm SOI CMOS," 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, San Francisco, CA, 2007, pp. 540-620.
    [17] W. Fei, H. Yu, H. Fu, J. Ren and K. S. Yeo, "Design and Analysis of Wide Frequency-Tuning-Range CMOS 60 GHz VCO by Switching Inductor Loaded Transformer," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 3, pp. 699-711, March 2014.
    [18] Z. Huang, "A 57.15–59.00GHz CMOS LC-VCO for V-Band high speed WPAN communication system," 2011 41st European Microwave Conference, Manchester, 2011, pp. 671-673.
    [19] Changhua Cao; O, K.K.; “Millimeter-wave voltage-controlled oscillators in 0.13-m CMOS technology”, IEEE Journal of Solid-State Circuits, vol. 41, Issue 6, pp. 1297-1304, 2006.
    [20] P. Huang, M. Tsai, G. D. Vendelin, H. Wang, C. Chen and C. Chang, "A Low-Power 114-GHz Push–Push CMOS VCO Using LC Source Degeneration," in IEEE Journal of Solid-State Circuits, vol. 42, no. 6, pp. 1230-1239, June 2007.
    [21] T. Nakamura, T. Masuda, K. Washio and H. Kondoh, "A Push-Push VCO With 13.9-GHz Wide Tuning Range Using Loop-Ground Transmission Line for Full-Band 60-GHz Transceiver," in IEEE Journal of Solid-State Circuits, vol. 47, no. 6, pp. 1267-1277, June 2012.
    [22] A. Musa, R. Murakami, T. Sato, W. Chaivipas, K. Okada and A. Matsuzawa, "A Low Phase Noise Quadrature Injection Locked Frequency Synthesizer for MM-Wave Applications," in IEEE Journal of Solid-State Circuits, vol. 46, no. 11, pp. 2635-2649, Nov. 2011.
    [23] O. Momeni and E. Afshari, "High Power Terahertz and Millimeter-Wave Oscillator Design: A Systematic Approach," in IEEE Journal of Solid-State Circuits, vol. 46, no. 3, pp. 583-597, March 2011.
    [24] A. Mirzaei, M. E. Heidari, R. Bagheri and A. A. Abidi, "Multi-Phase Injection Widens Lock Range of Ring-Oscillator-Based Frequency Dividers," in IEEE Journal of Solid-State Circuits, vol. 43, no. 3, pp. 656-671, March 2008.
    [25] Liang-Hung Lu and Jun-Chau Chien, "A wide-band CMOS injection-locked ring oscillator," in IEEE Microwave and Wireless Components Letters, vol. 15, no. 10, pp. 676-678, Oct. 2005.
    [26] Z. Zhang, L. Liu and N. Wu, "A novel 2.4-to-3.6 GHz wideband subharmonically injection-locked PLL with adaptively-aligned injection timing," 2014 IEEE Asian Solid-State Circuits Conference (A-SSCC), KaoHsiung, 2014, pp. 369-372.
    [27] K. Tsai and S. Liu, "A 43.7mW 96GHz PLL in 65nm CMOS," 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, San Francisco, CA, 2009, pp. 276-277,277a.
    [28] C. Wang, Z. Chen and P. Heydari, "W-Band Silicon-Based Frequency Synthesizers Using Injection-Locked and Harmonic Triplers," in IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 5, pp. 1307-1320, May 2012.
    [29] J. Lee, M. Liu and H. Wang, "A 75-GHz Phase-Locked Loop in 90-nm CMOS Technology," in IEEE Journal of Solid-State Circuits, vol. 43, no. 6, pp. 1414-1426, June 2008.
    [30] T. Chang, C. Wang and C. Wang, "A low power W-band PLL with 17-mW in 65-nm CMOS technology," IEEE Asian Solid-State Circuits Conference 2011, Jeju, 2011, pp. 81-84.
    [31] Le Ye, Yixiao Wang, Congyin Shi, Huailin Liao and Ru Huang, "A W-band divider-less cascading frequency synthesizer with push-push ×4 frequency multiplier and sampling PLL in 65nm CMOS," 2012 IEEE/MTT-S International Microwave Symposium Digest, Montreal, QC, 2012, pp. 1-3.
    [32] B. Catli and M. M. Hella, "Triple-Push Operation for Combined Oscillation/Divison Functionality in Millimeter-Wave Frequency Synthesizers," in IEEE Journal of Solid-State Circuits, vol. 45, no. 8, pp. 1575-1589, Aug. 2010.
    [33] P. Feng and S. Liu, "Divide-by-Three Injection-Locked Frequency Dividers Over 200 GHz in 40-nm CMOS," in IEEE Journal of Solid-State Circuits, vol. 48, no. 2, pp. 405-416, Feb. 2013.
    [34] A. Mazzanti, P. Uggetti and F. Svelto, "Analysis and design of injection-locked LC dividers for quadrature generation," in IEEE Journal of Solid-State Circuits, vol. 39, no. 9, pp. 1425-1433, Sept. 2004.
    [35] I. Lee, C. Wang and S. Liu, "3.6mW D-band divide-by-3 injection-locked frequency dividers in 65nm CMOS," IEEE Asian Solid-State Circuits Conference 2011, Jeju, 2011, pp. 93-96.
    [36] I. -. Lee, C. -. Wang and S. -. Liu, "Current-reused divide-by-3 injection-locked frequency divider in 65 nm CMOS," in Electronics Letters, vol. 47, no. 18, pp. 1029 -1030, 1 September 2011.
    [37] Y. Yeh and H. Chang, "Design and Analysis of a $W$-band Divide-by-Three Injection-Locked Frequency Divider Using Second Harmonic Enhancement Technique," in IEEE Transactions on Microwave Theory and Techniques, vol. 60, no. 6, pp. 1617-1625, June 2012.
    [38] Hsieh-Hung Hsieh et al., "A V-band divide-by-three differential direct injection-locked frequency divider in 65-nm CMOS," IEEE Custom Integrated Circuits Conference 2010, San Jose, CA, 2010, pp. 1-4.
    [39] T. Luo, S. Bai and Y. E. Chen, "A 60-GHz 0.13-um CMOS Divide-by-Three Frequency Divider," in IEEE Transactions on Microwave Theory and Techniques, vol. 56, no. 11, pp. 2409-2415, Nov. 2008.

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