矽金氧半導體電晶體尺寸迅速的縮減正面臨著極大的挑戰，最主要的挑戰便是閘極的氧化層厚度已經接近達到量子穿隧效應的厚度。一種直接的應變方法即在2007年時利用使用高介電常數材料可以直接解決尺規上的量子限制。但是最根本的解決方法為採用化合物半導體來取代現今的矽半導體，化合物半導體具備了比矽半導體更高功率及更高速度的優點。二氧化鉿具有介電常數高達20的優點、合適的能帶間隙以及具有和矽及砷化鎵堆疊後的陡峭界面及熱穩定性，因此被視為能取代二氧化矽的物種。
利用高解析穿隧電子顯微鏡、原子力顯微鏡、陀圓測厚儀、X-Ray reflectivity分析結構上的特性，電性上的量測(電流-電壓和電容-電壓)則是利用AGILENT 4284A and AGILENT 4156C而得。

The rapid shrinkage of transistor feature size in Si CMOS technology is now facing a great challenge, namely the thickness of the critical gate oxide thickness is now approaching to the quantum tunneling limit. An immediate remedy is to identify alternative high □ gate dielectrics replacing SiO2 in the near future by year 2007. The ultimate solution will likely be found in adopting compound semiconductors that offer competitive advantages over Si in high-speed computations, and microwave high power applications. Hafnium oxides, HfO2 with a □□of 20 was shown recently to be a promising candidate as alternative gate dielectric for both Si and GaAs CMOSFETs due to its suitable band gap, high dielectrics constant, and good thermal stability in contact with Si and GaAs interfaces.
Structural characteristics of these thin films were carried out by high resolution transmission electron microscopy (HRTEM) in conjunction with AFM, and X-ray reflectivity measurements. Electrical analysis were by the AGILENT 4284A and AGILENT 4156C to measure the I-V and C-V characteristics.

[1] Hiroshi Iwai and Shun’ichiro Ohmi, Tech. Dig. 4’th International Conference on Devices, Circuits and Systems, D049-1, 2002.
[2] H. Iwai, S. Ohmi, S. Akama, C. Ohshima, A. Kikuchi, I. Kashiwagi, J. Taguchi, H. Yamamoto, J. Tonotani, Y. Kim, I. Ueda, A. kuriyama and Y. Yoshihara, Tech. Dig. IEDM, 625, 2002.
[3] J. S. Suehle, E. M. Vogel, M. D. Edelstein, C. A. Richter, N. V. Nguyen, I. Levin, D. L. Kaiser, H. Wu and J. B. Bernstein, Tech. Dig. 6’th International Symp. On Plama Process-induced Damage, 90, 2001.
[4] S. J. Lee, C. h. Lee, Y. H. Kim, H. F. Luan, W. P. Bai, T. S. Jeon
and D. L. Kwong, Tech. Dig. IWGI, 85, 2001.
[5] L. Kang, B. H. Lee, W. J. Qi, Y. Jeon, R. Nieh, S. Gopalan, K. Onishi and J. C. Lee, IEEE Trans. Electron Devices, 181, 2000.
[6] L. Kang, K. Onishi, Y. Jeon, B. H. Lee, C. Kang, W. J. Qi, R. Nieh, S. Gopalan, R. Choi and J. C. Lee, Tech. Dig. IEDM, 35, 2000.
[7] K. Onishi, L. Kang, R. Choi, E. Dharmarajan, S. Gopalan, Y. Jeon, C. S. Kang, B. H. Lee, R. Nieh and J. C. Lee, Tech. Dig. Symp. VLSI, 131, 2001.
[8] R. Nieh, K. Onishi, R. Choi, H. J. Cho, C. S. Kang, S. Gopalan, S. Krishna and J. C. Lee, Tech. Dig. IWGI, 70, 2001.
[9] H. J. Cho, C. S. Kang, K. Onishi, S. Gopalan, R. Nieh, R. Choi, E. Dharmarajan and J. C. Lee, Tech. Dig. IEDM, 655, 2001.
[10] K. Onishi, C. S. Kang, R. Choi, S. Gopalan, R. Nieh, E. Dharmarajan and J. C. Lee, Tech. Dig. IEDM, 659, 2001.
[11] Materials Research Bulletin, March 2002 issue, on “Alternative Gate Dielectric for Microelectronics”, Ed. by R. M. Wallace and G. D. Wilk.
[12] G. D. Wilk et al, J. Appl. Phys. 89, 5243 (2001).
[13]”Semiconductor material and device characterization” by Dieter K. Schroder.
[14] 施敏原著，張俊彥議著，”半導體元件物理與製作技術”
[15] 汪建民”材料分析”，初版中華民國87年10月10日
[16] H. Y. Lee and T. B. Wu, J. Mater. Res. 12 (1997) 3165.
[17] L. G. Parratt, Phys. Rev. 95 (1954) 359.
[18] D. K. Bowen and B. K. Tanner, Nanotechnology, 4 (1993) 175.
[19] S. K. Sinha, E. B. Sirota, S. Garoff and H. B. Stanley, Phys. Rev. B 38 (1988) 2297.
[20] C. A. Lucas, P. D. Hatton, S. Bates, W. Ryan, S. Miles, and B. K. Tanner, J. Appl. Phys. 63 (1988) 1936.
[21] S. M. Heald, H. Chen, and J. M. Tranquada, Phys. Rev. B 38 (1988) 1016.
[22] H. T. Lue, C. Y. Liu, and C. Y. Tseng, IEEE Electronic Device
Letters, 23, 553, (2002)