在消費性電子產業的帶領下，縮小化與多功能實為電子元件的一大難題。而藉由微加工技術的感測功能與整合能力，將有助於解決此一難題。現今多功系統的整合皆是透過系統級封裝(System-in-Packaging，簡稱SiP)的異質整合技術來達成目的。本研究希望依此架構，來研發易於垂直整合的微機電元件，不管是應用於微元件的封裝亦或是微元件的三維整合，皆希望透過穿透矽晶片導線(Through-Silicon Via,簡稱TSV)來達成，核心技術將是利用TSV來貫穿矽晶圓，達成三維微機電元件的製造與封裝。所以本論文將會以埋藏TSV的微機電元件為主軸，可以達成晶圓級封裝微機電元件之外，亦可以自行堆疊達成多功微系統。首先第一部分將以電鍍金屬的方式來製作TSV，並展示出其與SOI-MEMS元件的整合潛力，並利用陽極接合的方式完成整各微機電元件的封裝。第二部份將進一步利用新型的玻璃回融技術，製造出低阻值的單晶矽TSV，整合SOG-MEMS元件在埋藏有垂直導線的玻璃晶圓上，製造出的元件不但可以直接堆疊，並且也可以利用晶圓接合的方式完成封裝。第三部份將會利用玻璃回融技術製造出具有埋藏垂直導線的玻璃探針陣列，利用TSV的技術，將二維的探針陣列垂直堆疊而製造出三維的探針陣列，以作為生物或是神經訊號的探取工具。

Due to the development of portable consumer products, minimization and multi-functions of an electronic device is the next challenge for the semiconductor industry. Sensing function and integration compatibility provided by micromachining technology is the promising technique to overcome those issues. Also, nowadays a heterogeneous integration microsystem could be achieved by System-in-Packaging (SiP) based on micromachining technology. This research focuses on the development of the microdevice which is suitable for heterogeneous integration. Through-Silicon Via (TSV) technology was applied to implement this goal in applications like three-dimensional packaging and integration of microdevice. The core technology is to embed TSV inside MEMS substrate wafer to fabricate MEMS device and packaging. This research will utilize the MEMS device with embedded TSV, either in wafer-level packaging (WLP) and multi-functions microsystem by stacking vertically. In the first part of this research, TSV fabricated by metal electroplating was achieved. And integration of this technique in SOI-MEMS wafer is demonstrated. Then anodic bonding was combined in process flow to achieve WLP of single-crystalline silicon device. In the second part of this research, a novel glass reflow technology was utilized to fabricate low-resistivity silicon TSV. SOG-MEMS device with embedded TSV was fabricated. Both of those devices are 3D stacking compatible and WLP can be achieved by wafer bonding technology. Third part of this research is glass microprobe array with embedded silicon vias by glass reflow technology. By TSV technique, 3D microprobe array, as a probing tool for biological and neural signals, can be accomplished by stacking of 2D microprobe array.

[1] H. C. Nathanson, W. E. Newell, R. A. Wickstrom, and J. R. Davis Jr, “The resonant gate transistor,” IEEE Transaction on Electron Devices, Vol. ED-14, No. 3, March 1967.
[2] www.nintendo.com/wii
[3] Ganesh VP, S. Lim, D. Witarsa, H. W. Yin, M. Kumar, LA Lim, Yoon S W, and V Kripesh, “Assembly Technology Development for 3D Silicon Stacked Module for Handheld Products,” Proc. 56th Electronic Components and Technology Conf., California, USA, May 30-June 2, 2006, pp. 1300-1306.
[4] T. Fukushima, Y. Yamada, H. Kikuchi, and M. Koyanagi, “New Three-Dimensional Integration Technology Using Chip-to-Wafer Bonding to Achieve Ultimate Super-Chip Integration,” JJAP, Vol. 45, 4B, 2006, pp. 3030-3035.
[5] D. Henry, D. Belhachemi, J-C. Souriau, C. Brunet-Manquat, C. Puget, G. Ponthenier, JL. Vallejo, C. Lecouvey, and N. Sillon, “Low Electrical Resistance Silicon Through Vias: Technology and Characterization,” Proc. 56th Electronic Components and Technology Conf., California, USA, May 30-June 2, 2006, pp. 1360-1366.
[6] L. Lin, R. T. Howe, and A. P. Pisano, “Microelectromechanical filters for signal processing,” J. MEMS, vol.7, 1998, pp. 286-294.
[7] D. G. Jones, R. G. Azevedo, M. W. Chan, A. P. Pisano, and M. Wijesundara, “Low temperature ion beam sputter deposition of amorphous silicon carbide for wafer-level vacuum sealing,” MEMS 2007, Kobe, Japan, 21-25, Jan., 2007, pp. 275-278.
[8] A. Witvrouw, A. Mehta, A. Verbist, B. Du Bois, S. Van Aerde, J. Ramos-Martos, J. Ceballos, A. Ragel, J. M. Mora, M. A. Lagos, A. Arias, J. M. Hinojosa, J. Spengler, C. Leinenbach, T. Fuchs, S. Kronmuller, “Processing of MEMS gyroscopes on top of CMOS ICs,” ISSCC 2005, pp. 88-89.
[9] http://www.sitime.com/
[10] R. N. Candler, M. A. Hopcroft, B. Kim, W-T Park, R. Melamud, M. Agarwal, G. Yama, A. Parridge, M. Lutz, and T. W. Kenny, “Long-term and accelerated life testing of a novel single-wafer vacuum encapsulation for MEMS resonators,” J. MEMS, vol.15, 2005, pp. 1446-1456.
[11] K. S. Lebouitz, R. T. Howe, and A. P. Pisano, “Permeable polysilicon etch-access windows for microshell fabrication,” Transducer ’95, Stockholm, Sweden, 25-29 June, 1995, pp. 224-227.
[12] R. He, and C. J. Kim, “On-wafer monolithic encapsulation by surface micromachining with porous polysilicon shell,” J. MEMS, vol.16, 2007, pp. 462-472.
[13] Y. C. Lee, B. Amir Parviz, J.A. Chiou, and S. Chen, “Packaging for microelectromechanical and nanoelectromechanical systems,” IEEE Transactions on Advanced Packaging, vol.26, Aug. 2003, pp. 217-226.
[14] “Inside market-leading accelerometers and gyroscopes,” http://semiconwest.semi.org/ProgramsandEvents/TechXPOTS/ctr_011296?linkval=TechXPOT%20Programs&parent=yes&parentId=5
[15] http://www.analog.com/en/prod/0,2877,ADXL330,00.html
[16] http://www.invensense.com/
[17] S. S. Nasiri, and A. F. Flannery Jr. “Method of fabrication of Al/Ge bonding in a wafer packaging environment and a product produced therefore,” International Patent, 2005, W0 2006/101769.
[18] O. Oralkan, A. S. Ergun, C. H. Cheng, J. A. Johnson, M. Karaman, T. H. Lee, and B. T. Khuri-Yakubi, “Volumetric ultrasound imaging using 2-D CMUT arrays,” IEEE transactions on ultrasonics, ferroelectrics, and frequency control, vol.50, pp. 1581-1594, 2003.
[19] ”Electrical through silicon wafer interconnects for high frequency photonic devices”
www.standford.edu/group/SPRC/Report/poster/cheng.pdf
[20] D. W. Lee, T. Ono, T. Abe, and M. Esashi, “Microprobe array with electrical interconnection for thermal imaging and data storage,” J.MEMS, vol.11, pp. 215-221, 2002.
[21] C. S. Premachandran, R. Nagarjan, C. Y. Xiolin, and C. S. Choong, “A novel electrically conductive wafer through hole filled vias interconnect for 3D MEMS packaging,” Proc. 53th Electronic components and technology conf., ,New Orlean, U.S.A, May. 2003, pp. 627-630
[22] H. Ko, S. Park, B. D. Choi, Y. Park, G. Lim, S. J. Paik, A. Le, K. Yo, S. Lee, J. Lim, S. C. Lee, M. H. Park, H. S. Jang, J. Lee, Y. K. Roh, and D. L. Cho, “Two-chip implemented, wafer-level hermetic packaged accelerometer for tactical and inertial applications,” Transducers’05, Seoul, Korea, June 5-9, 2005, pp. 507-510.
[23] R.A.M. Receveur, M. Zickar, C. Marxer, V. Larik, and N.F. de Rooij, “Wafer level hermetic package and device testing of a SOI-MEMS switch for biomedical applications,” J. Micromech. and Microeng., Vol. 16, pp. 676-683, 2006.
[24] V. Kaajakari, J. Kiihamaki, A. Oja, H. Seppa, S, Pietikainen, V. Kokkala, and H. Kuisma, “Stability of wafer level vacuum encapsulated single-crystal silicon resonators,” Transducers’05, Seoul, Korea, June 5-9, 2005, pp. 916-919.
[25] J.-Y. Lee, S.-H. Jeon, H.-K. Jung, H.-K. Chang, and Y.-K. Kim, “Vacuum packaged single crystal silicon gyroscope with sub mdeg/s/√Hz resolution,” Transducers’05, Seoul, Korea, June 5-9, 2005, pp. 531-534.
[26] J. Chae, J. M. Giachino, and K. Najafi, “Fabrication and characterization of a wafer-level MEMS vacuum packages with vertical feedthroughs,” J. MEMS, vol.17, 2008, pp. 193-200.
[27] C. H. Yun, T. J. Brosnihan, W. A. Webster and J. Villarreal, “Wafer-level packaging of MEMS accelerometers with through-wafer interconnects,” Proc. 56th Electronic Components and Technology Conf., FL, USA, May 30-June 2, 2006, pp. 320-323.
[28] C. H. Yun, J. R. Martin, T. Chen and D. Davis, “MEMS wafer-level packaging with conductive vias and wafer bonding,” Transducers’07 Lyon, France, June 10-14, 2007, pp. 2091-2094.
[29] www.hymite.com
[30] R. Hauffe, A. Kilian, M. Winter, L. Shiv, G. Elger, M. Heschel, J. Kuhmann, S. Isaacs, S. Weichel, P. Gaal, H. Korth, and A. Hase, “Optimized micro-via technology for high density and high frequency (＞40GHz) hermetic through-wafer connections in silicon substrates,” Proc. 56th Electronic Components and Technology Conf., FL, USA, May 31-June 3, 2006, pp. 324-330.
[31] S.-H. Lee, S. W. Lee, and K. Najafi, “A generic enviornment-resistant packaging technology for MEMS,” Transducers’07, Lyon, France, June 10-14, 2007, pp. 335-338.
[32] J. Wei, M. Van der Velden, and P. M. Sarro, “Fabrication of vertical electrodes on channel sidewall for picoliter liquid measurement,” Transducers’07, Lyon, France, June 10-14, 2007, pp. 1612-1616.
[33] T. Bauer, “High Density Through Wafer Via Technology,” NSTI-Nanotech 2007, Santa Clara, California, U.S.A., May 20-24, 2007, pp. 116-119.
[34] “Electrical feedthroughs using wafer-level glass-flow technology,” Achievements and Results Annual Report 2005, Fraunhofer ISIT, Itzehoe(DE),2005, http://www.isit.fraunhofer.de/german/download/JB2005A4.pdf
[35] http://www.vti.fi/
[36] C. Moldovan, V. Llian, Ghe. Constantin, R. Iosub, M. Modreanu, I. Dinoiu, B. Firtat, and C. Voitincu, “Micromachining of a silicon multichannel microprobe for neural electrical activity recording,” Sensors and Actuators A, Vol. 99, pp. 119-124, 2002.
[37] P. K. Campbell, K. E. Jones, R. J. Hubert, K. W. Horch, and R. A. Normann, “A silicon-based, three-dimensional neural interface: Manufacturing processes for an intracortical electrode array,“ IEEE Transaction on Biomedical Engineering, Vol. 38, pp. 758-768, 1991.
[38] C.-C. Wen, Y.-T. Lee, S.-R. Yeh, and W. Fang, “A novel neural recording probe with built-in load sensors,” IEEE sensors 2007 conference, Atlanta, Georgia, U.S.A, October 28-31, 2007, 1128-1131.
[39] Q. Bai, K. D. Wise, and D. J. Anderson, “A high-yield microassembly structure for three-dimensional microelectrode arrays,” IEEE Transaction on Biomedical Engineering, Vol. 47, pp. 281-289, 2000.
[40] Y. Yao, M. N. Gulari, J. A. Wiler, and K. D. Wise, “A microassembled low-profile three-dimensional microelectrode array for neural prosthesis applications,” J. Microelectromech. Syst., vol. 16, pp. 977-988, 2007.
[41] J.T. Nee, R.A. Conat, K.Y. Lau, and R.S. Muller, “Lightweight, optically flat micromirrors for fast beam steering,” Optical MEMS’00, Kauai, HI, 21-24 Aug. 2000, pp. 9-10.
[42] U. Krishnamoorthy, O. Solgaard, “Self-aligned vertical comb-drive actuators for optical scanning micromirrors,” Optical MEMS’01, Okinawa, Japan, Sep. 2001.
[43] H.D. Nguyen, D. Hah, P.R. Patterson, R. Chao, W. Piyawattanametha, E.K. Lau, and M.C. Wu, “Angular vertical comb-driven tunable capacitor with high-tuning capabilities,” J.MEMS, vol.13, 2004 pp. 406 – 413.
[44] H. Toshiyoshi, M. Mita, and H. Fujita, “A MEMS Piggyback Actuator for Hard-Disk Drivers,” J.MEMS, vol.11, 2002, pp. 648-654.
[45] A. Cao, J. B. Kim, T. Tsao, and L. Lin, “A Bi-Direectional Electrothermal Electromagnetic Actuator,” MEMS’04, Maastricht, The Netherlands, Jan. 2004, pp. 450-453.
[46] J. Chae, H. Kulah, and K. Najafi, “A CMOS-compatible high aspect ratio silicon-on-glass in-plane micro-accelerometer,” J. Micromech. and Microeng., Vol. 15, pp. 336-345, 2005.
[47] S.E. Alper, and T. Akin, “A Single-Crystal Silicon Symmetrical and Decoupled MEMS Gyroscopes on an Insulating Substrate,” J. Microelectromech. Syst., vol. 14, pp. 707-717, 2005.
[48] M. C. Lee, S. J. Kang, K. D. Jung, S.-H. Choa, and Y. C. Cho, “A high yield rate MEMS gyroscope with a packaged SiOG process,” J. Micromech. and Microeng., Vol. 15, pp. 2003-2012, 2005.
[49] P. Merz, H.J. Quenzer, H. Bernt, B. Wagner, and M. Zoberbier, “A novel micromachining technology for structuring borosilicate glass substrates,” Transducers’03, Boston, U.S.A., June 8-12, 2003, pp. 258-261.
[50] X. Qi, F. T. Akin, and Y. S. Lin, “Ceramic-glass composite high temperature seals for dense ionic-conducting ceramic membranes,” Journal of Membrane Science, Vol. 193, pp. 185-193, 2001.
[51] MIL-STD-883E, US department of defense, Dec. 31, 1996.
[52] http://www.saesgetters.com/
[53] Corning Pyrex Properties, Ferro-Ceramics Grinding Inc., http: www.ferroceramic.com/corning_table.htm.
[54] S.C. Bayliss, L.D. Buckberry, I. Fletcher, M. J. Tobin, “The culture of neurons on silicon,” Sensors and Actuators A, Vol. 74, pp. 139-142, 1999.
[55] X. Li, T. Abe, and M. Esashi, “Deep reactive ion etching of Pyrex glass using SF6 plasma,” Sensors and Actuators A, Vol. 87, pp. 139-145, 2001.
[56] A. Baram, and M. Naftali, “Dry etching of deep cavities in Pyrex for MEMS applications using standard lithography,” J. Micromech. and Microeng., Vol. 16, pp. 2287-2291, 2006.
[57] R. J. Vetter, J. C. Williams, J. F. Hetke, E. A. Nunamaker, and D. R. Kipke, “Chronic neural recording using silicon-substrate microelectrode arrays implanted in cerebral cortex,” IEEE Transactions on Biomedical Engineering, Vol. 15, pp. 896-904, 2004.
[58] S. Musa, M. Welkenhuysen, R. Huys, W. Eberle, K. Kuyck, C. Bartic, B. Nuttin, and G. Borghs, “Planar 2D-array neural probe for deep brain stimulation and recording (DBSR),” Proc. of 4th Europe Conference of the International Federation for Medical and Biological Engineering, Antwerp, Belgium, Nov. 23-27, 2008, pp. 2421-2425.
[59] W.-Y. Cheng, W.-L. Hsu, H.-H. Cheng, Z.-H. Huang, and Y.-C. Chang, “An observation chamber for studying temperature-dependent and drug-induced events in live neurons using fluorescence microscopy, “ Analytical Biochemistry Vol. 386, pp. 105-112, 2009
[60] A. Van Harreveld, and C. A. G. Wiersma, “The triple innervations of the crayfish muscle,” Proceeding of the National Academy Science, Vol. 22, pp. 667, 1936.
[61] T. H. Yoon, E. J. Hwang, D. Y. Shin, S. I. Park, S. J. Oh, S. C. Jung, H. C. Shin, and S. J. Kim, “A micromachined silicon depth probe for multichannel neural recording,” IEEE Transaction on Biomedical Engineering, Vol. 47, pp. 1082-1087, 2000.
[62] Y.-T. Lee, C.-W. Lin, C.-M. Lin, S.-R. Yeh, Y.-C. Chang, and W. Fang, “A pseudo 3D glass microprobe array: glass microprobe with embedded silicon for alignment and electrical interconnection during assembly,” J. Micromech. and Microeng., Vol. 20, 025014, 2010.