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研究生: 蔡宗達
Tsai, Chung-Ta
論文名稱: 使用合成漣波磁滯控制機制的快速暫態響應降壓式轉換器
A Fast Response Buck Converter Using Synthetic Ripple Hysteresis Control Scheme
指導教授: 周懷樸
Chou, Hwai-Pwu
口試委員:
學位類別: 碩士
Master
系所名稱: 原子科學院 - 工程與系統科學系
Department of Engineering and System Science
論文出版年: 2009
畢業學年度: 98
語文別: 中文
論文頁數: 82
中文關鍵詞: 磁滯控制合成漣波快速暫態磁滯帶調變
外文關鍵詞: hysteresis control, synthetic ripple, fast transient, hysteresis band modulation
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  • 本論文提出一個使用合成漣波磁滯控制機制的直流對直流降壓型轉換器,具有快速暫態響應路徑可以定義磁滯帶( Hysteresis band)寬度。在負載電流改變時,磁滯帶寬度、切換頻率與責任週期同時調變以加速穩壓,因此可減少輸出電壓之回復時間與過驅電壓,改善暫態響應。由於本論文提出之架構除了輸出電感與電容,不需要其他外部補償元件,因此可節省電路板面積,適用於可攜式裝置。全電路使用TSMC 0.35μm 2P4M的製程技術做設計與模擬分析,晶片之面積為1914μm × 2096μm,電路輸入電壓範圍為2.7V-4.2V,輸出電壓為2V。全晶片模擬結果顯示當負載電流在100毫安與500毫安間變化時,輸出電壓回復時間在10微秒以內,最大轉換效率為85.74%。


    This thesis presents an integrated DC-DC buck converter using the synthetic ripple hysteresis control scheme with a fast transient path to define the boundary of hysteresis band. The hysteresis band and switching frequency depend on load current changes; therefore, it accelerates regulation and reduces overshoot. The present work requires no external compensation capacitors and can be implemented with integrated technology for on-chip applications. The whole chip is designed and simulated with TSMC 0.35μm 2P4M fabrication process data. The input supply voltage range of this work is 2.7V-4.2V, and the output voltage is 2V. The chip area is 1914μm × 2096μm. Full chip simulation results indicated output voltage recovery time is shortened within 10µs under load current condition between 100mA to 500mA, and the maximum conversion efficiency is 85.74%.

    中文摘要……………………………………………………………………………………i 英文摘要……………………………………………………………………………………ii 誌謝…………………………………………………………………………………………iii 目錄…………………………………………………………………………………………iv 表目錄………………………………………………………………………………………vii 圖目錄………………………………………………………………………………………viii 第一章 緒論………………………………………………………………………………1 1.1 穩壓器分類………………………………..……………………………………..1 1.1.1 線性穩壓器……………………………………………………………….....2 1.1.2 電荷幫浦式穩壓器………………………………………………………….3 1.1.3 切換式穩壓器……………………………………………………………….5 1.1.4 比較………………………………………………………………………….6 1.2 研究動機及目的…………………………………………………………………7 1.3 論文架構…………………………………………………………………9 第二章 文獻回顧…………………………………………………………………………...11 2.1 切換式穩壓器直流對直流電壓轉換之組態………………………………..…11 2.2 降壓型切換式穩壓器之行為分析………………………………..……………14 2.2.1 連續導通模式………………………………….……………..……………14 2.2.2 非連續導通模式……………………………….……………..……………17 2.3 磁滯控制之系統分析……………………………………………..……………19 2.4 合成漣波控制……………………………………………..……………………23 2.5 切換式穩壓器之重要規格………………………………..……………………25 2.5.1 轉換效率………………………………….……………..…………………25 2.5.2 暫態響應………………………………….……………..…………………28 2.5.3 負載調節率與線性調節率……………….……………..…………………29 2.6 總結………………………………………………………..……………………30 第三章 電路架構原理與設計……………………………………………………………...31 3.1 磁滯控制介紹……………………………………………..……………………31 3.2 電路運作流程與架構簡介…………………………..…………………………32 3.2.1 合成漣波迴路………………………………….……………..……………31 3.2.2 輸出穩壓迴路………………………………….……………..……………34 3.3 輸出元件選擇……………………………………………..……………………39 第四章 電路實現與模擬分析……………………………………………………………...41 4.1 偏壓電路與參考電壓源…………………………………..……………………41 4.1.1 偏壓電路實現與模擬分析…………………….……………..……………41 4.1.2 帶差參考電路實現與模擬分析………………….…………..……………43 4.2 誤差放大器………………………………………………..……………………46 4.3 漣波合成器………………………………………………..……………………48 4.4 快速暫態響應機制………………………………………..……………………50 4.5 緩起動電路………………………………………………..……………………54 4.6 磁滯比較器………………………………………………..……………………56 4.7 驅動級電路………………………………………………..……………………58 4.7.1 Dead Time控制電路………….……………….……………..……………59 4.7.2 數位緩衝器……………………………………….…………..……………60 4.8 全電路模擬………………………………………………..……………………62 第五章 電路佈局與量測規畫……………………………………………………………...66 5.1 佈局考量………………………………………………..………………………66 5.2 電路佈局………………………………………………..………………………69 5.3 後佈局模擬( Post-layout simulation )結果………….…..……………..………71 5.4 量測環境規畫…………………………………………..………………………73 第六章 結論與建議 ...…………………………………………………………….......74 6.1 結論 ……………………………………………………..………………………74 6.2 建議與未來展望………………………………………..………………………74 參考文獻……………………………………………………………………………………...76 附錄一 國家晶片系統中心下線晶片審查結果建議回覆………………………………...79 附錄二 個人簡歷…………………………………………………………………………...82

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