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研究生: 林威廷
Lin, Wei-Ting.
論文名稱: 可見光通訊之正交分頻多工收發機
An OFDM-based Transceiver for Visible Light Communications
指導教授: 馬席彬
Ma, Hsi-Pin
口試委員: 蔡佩芸
Tsai, Pei-Yun
楊家驤
Yang, Chia-Hsiang
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2018
畢業學年度: 107
語文別: 英文
論文頁數: 91
中文關鍵詞: 可見光通訊正交分頻多工直流偏置光正交分頻多工收發機強度調變/直接偵測
外文關鍵詞: visible light communication, OFDM, DCO-OFDM, transceiver, intensity modulation/direct detection
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  • 本篇論文中,我們已設計一個可見光通訊的收發機,並藉此達到高傳輸速率的目標。為達到高傳輸速率的目標與適應不同燈具通道衰減不同的影響,因此我們採用正交分頻多工(OFDM)系統來改善,然而因強度調變與直接偵測技術(IM/DD)的緣故,正交分頻多工被更換為直流偏置光正交分頻多工(DCO-OFDM)系統。
    在設計系統前,我們設定一些參數來當系統規格。首先,在我們的系統當中,我們使用16-正交振幅調變(QAM)調變技術與1024點快速傅立葉轉換(FFT)。在快速傅立葉轉換的模組中,我們使用單一路徑延遲迴授(SDF)系統來達到高吞吐量的應用;亦用以2/4/8為基底(Radix-2/4/8)的演算法來減少乘法器的使用量。此外, 循環字首(CP)的部分我們採用1/8的比例,它主要是被用來對抗多路徑通道所造成的符元間干擾(ISI)的影響。藉由測量引航符元的角度變化,我們可以容忍±100 百萬分率的取樣時脈偏移(SCO)效應。最後,我們也有使用前置符元作為參考訊號,並使用於訊框偵測。除此之外,我們系統中的位元錯誤率在訊號雜訊比(SNR) 21 分貝下已可以低於〖10〗^(-3)。
    因為在這篇論文中,我們合作對象為工研院,所以我們必須與工研院整合許多模組,包括乙太網路、數位類比轉換器(DAC)、類比數位轉換器(ADC)和前端電路。每整合一個模組後,我們都有提供測量結果,藉此證明傳輸無誤。因為前端電路所提供的通道訊號雜訊比未達到16-正交振幅調變的要求,所以目前還未與前端電路進行整合。此外,由於數位類比轉換器與類比數位轉換器的取樣頻率限制,我們以較低的傳輸速率播放影片並測試重新連線的功能,但我們收發機的傳輸速率經高性能機體測試後,證明可以達到100 百萬位元/秒的傳輸速率。


    In this thesis, we have designed a transceiver for VLC to attain the high-speed transmission. To achieve the goal of high-speed transmission and accommodate different channel decay from different LED, we adopt orthogonal frequency division multiplexing (OFDM) system. However, due to intensity modulation/direct detection (IM/DD) technology, OFDM system is substituted for DC-biased optical OFDM (DCO-OFDM) system.

    Before designing the system, we set up some parameters to be the specification. First, we use 16-QAM modulation and 1024 points Fast Fourier Transform (FFT) in our system. In the FFT module, we use single-path delay feedback (SDF) architecture to achieve high throughput application and exploit radix-2/4/8 algorithm to save some multipliers. Next, the ratio of cyclic prefix (CP) which is exploit to combat the effect of inter-symbol interference (ISI) caused by multi-path channel is 1/8. After that, by estimating the phase variety of pilot signal, the effect of SCO we can tolerate was +- 100 ppm. In the end, we also used the preamble signal to be the reference signal for frame detection. In addition, the bit error rate (BER) of our system has been lower than 10^(-3) with 21 dB in simulation.

    Because we collaborate with Industrial Technology Research Institute (ITRI) on this thesis, we have to integrate some modules with ITRI, including Ethernet, DAC (Digital to Analog Converter), ADC (Analog to Digital Converter) and front-end circuit. After integrating each module, we have offered the measurement results to show that the transmission is error-free. However, the channel SNR offered from front-end circuit does not meet the demand of 16-QAM, we do not integrate with it yet. In addition, due to the limit of the sampling rate of ADC and DAC, we have displayed video through sub miniature a (SMA) with lower data rate and test the function of reconnection, but the data rate of our transceiver tested by high performance chassis have attained over 100 Mbps.

    Abstract(i) 1 Introduction 1 1.1 Background 1 1.2 Motivation 2 1.3 Main Contributions 4 1.4 Organization 5 2 Visible Light Communications Related Works and Technologies 7 2.1 Related Works 7 2.2 OFDM Systems 8 2.3 VLC-based OFDM systems 9 2.3.1 DC-biased Optical OFDM Systems 11 2.3.2 Asymmetrically Clipped Optical OFDM Systems 13 2.3.3 Pulse-amplitude-modulated Discrete Multitone Systems 14 2.3.4 Unipolar OFDM Systems 15 2.4 Symbol Structure 17 2.5 System Parameters 19 3 System Design 21 3.1 Design Flow 21 3.2 DCO-OFDM Systems 22 3.2.1 Transmitter 23 3.2.2 Receiver 37 3.2.3 Verification Performance 41 4 Architecture Design 47 4.1 Transmitter 48 4.1.1 Modulation 49 4.1.2 Pilot Allocation 50 4.1.3 Inverse Fast Fourier Transform 51 4.1.4 Cyclic Prefix Insertion 61 4.2 Receiver 61 4.2.1 Cyclic Prefix Removal 62 4.2.2 Fast Fourier Transform 63 4.2.3 Pilot Extraction 63 4.2.4 Demodulation 64 4.3 Device Utilization 65 4.4 Verification Results 65 5 Integration and Verification 69 5.1 Ethernet and Channel Coding 71 5.2 Digital to Analog Converter and Analog to Digital Converter 73 5.2.1 Digital to Analog Converter 74 5.2.2 Analog to Digital Converter 74 5.2.3 Measurement Results 75 5.3 Two Board Transmissions through Sub Miniature A 78 5.4 Front-end Circuits and LED 80 6 Conclusions and Future Works 85 6.1 Conclusions 85 6.2 Future Works 86

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